mlx5-abi.h (24d33d2c8e92abffe1f0653d42fc65b8f164a6d9) mlx5-abi.h (5c99eaecb1fce76e86cf74020624e36fbb63c3bf)
1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
2/*
3 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

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119 __u32 max_srq_recv_wr;
120 __u16 num_ports;
121 __u16 reserved1;
122 __u32 comp_mask;
123 __u32 response_length;
124 __u8 cqe_version;
125 __u8 cmds_supp_uhw;
126 __u8 eth_min_inline;
1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
2/*
3 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the

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119 __u32 max_srq_recv_wr;
120 __u16 num_ports;
121 __u16 reserved1;
122 __u32 comp_mask;
123 __u32 response_length;
124 __u8 cqe_version;
125 __u8 cmds_supp_uhw;
126 __u8 eth_min_inline;
127 __u8 reserved2;
127 __u8 clock_info_versions;
128 __u64 hca_core_clock_offset;
129 __u32 log_uar_size;
130 __u32 num_uars_per_page;
131 __u32 num_dyn_bfregs;
132 __u32 reserved3;
133};
134
135struct mlx5_ib_alloc_pd_resp {

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389 __u64 cycles;
390 __u64 frac;
391 __u32 mult;
392 __u32 shift;
393 __u64 mask;
394 __u64 overflow_period;
395};
396
128 __u64 hca_core_clock_offset;
129 __u32 log_uar_size;
130 __u32 num_uars_per_page;
131 __u32 num_dyn_bfregs;
132 __u32 reserved3;
133};
134
135struct mlx5_ib_alloc_pd_resp {

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389 __u64 cycles;
390 __u64 frac;
391 __u32 mult;
392 __u32 shift;
393 __u64 mask;
394 __u64 overflow_period;
395};
396
397enum mlx5_ib_mmap_cmd {
398 MLX5_IB_MMAP_REGULAR_PAGE = 0,
399 MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES = 1,
400 MLX5_IB_MMAP_WC_PAGE = 2,
401 MLX5_IB_MMAP_NC_PAGE = 3,
402 /* 5 is chosen in order to be compatible with old versions of libmlx5 */
403 MLX5_IB_MMAP_CORE_CLOCK = 5,
404 MLX5_IB_MMAP_ALLOC_WC = 6,
405 MLX5_IB_MMAP_CLOCK_INFO = 7,
406};
407
397enum {
398 MLX5_IB_CLOCK_INFO_KERNEL_UPDATING = 1,
399};
408enum {
409 MLX5_IB_CLOCK_INFO_KERNEL_UPDATING = 1,
410};
411
412/* Bit indexes for the mlx5_alloc_ucontext_resp.clock_info_versions bitmap */
413enum {
414 MLX5_IB_CLOCK_INFO_V1 = 0,
415};
400#endif /* MLX5_ABI_USER_H */
416#endif /* MLX5_ABI_USER_H */