soc.h (808db4a4512bedd45b62de255f7eedb5d5b788b9) soc.h (a71a468a50f1385855e28864e26251b02df829bb)
1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify

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16#include <linux/platform_device.h>
17#include <linux/types.h>
18#include <sound/driver.h>
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/control.h>
22#include <sound/ac97_codec.h>
23
1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify

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16#include <linux/platform_device.h>
17#include <linux/types.h>
18#include <sound/driver.h>
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/control.h>
22#include <sound/ac97_codec.h>
23
24#define SND_SOC_VERSION "0.11.8"
24#define SND_SOC_VERSION "0.12"
25
26/*
27 * Convenience kcontrol builders
28 */
29#define SOC_SINGLE_VALUE(reg,shift,mask,invert) ((reg) | ((shift) << 8) |\
30 ((shift) << 12) | ((mask) << 16) | ((invert) << 24))
31#define SOC_SINGLE_VALUE_EXT(reg,mask,invert) ((reg) | ((mask) << 16) |\
32 ((invert) << 31))

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136 * depending on codec type.
137 */
138/* ratio of sample rate to mclk/sysclk */
139#define SND_SOC_FS_ALL 0xffff /* all mclk supported */
140
141/* bit clock dividers */
142#define SND_SOC_FSBD(x) (1 << (x - 1)) /* ratio mclk:bclk */
143#define SND_SOC_FSBD_REAL(x) (ffs(x))
25
26/*
27 * Convenience kcontrol builders
28 */
29#define SOC_SINGLE_VALUE(reg,shift,mask,invert) ((reg) | ((shift) << 8) |\
30 ((shift) << 12) | ((mask) << 16) | ((invert) << 24))
31#define SOC_SINGLE_VALUE_EXT(reg,mask,invert) ((reg) | ((mask) << 16) |\
32 ((invert) << 31))

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136 * depending on codec type.
137 */
138/* ratio of sample rate to mclk/sysclk */
139#define SND_SOC_FS_ALL 0xffff /* all mclk supported */
140
141/* bit clock dividers */
142#define SND_SOC_FSBD(x) (1 << (x - 1)) /* ratio mclk:bclk */
143#define SND_SOC_FSBD_REAL(x) (ffs(x))
144#define SND_SOC_FSBD_ALL 0xffff /* all bit clock dividers supported */
145
144
146/* bit clock ratio to sample rate */
147#define SND_SOC_FSB(x) (1 << ((x - 16) / 16))
148#define SND_SOC_FSB_REAL(x) (((ffs(x) - 1) * 16) + 16)
145/* bit clock ratio to (sample rate * channels * word size) */
146#define SND_SOC_FSBW(x) (1 << (x - 1))
147#define SND_SOC_FSBW_REAL(x) (ffs(x))
149/* all bclk ratios supported */
148/* all bclk ratios supported */
150#define SND_SOC_FSB_ALL SND_SOC_FSBD_ALL
149#define SND_SOC_FSB_ALL ~0ULL
151
152/*
153 * DAI hardware flags
154 */
150
151/*
152 * DAI hardware flags
153 */
155/* use bfs mclk divider mode, else sample rate ratio */
156#define SND_SOC_DAI_BFS_DIV 0x1
154/* use bfs mclk divider mode (BCLK = MCLK / x) */
155#define SND_SOC_DAI_BFS_DIV 0x1
156/* use bfs rate mulitplier (BCLK = RATE * x)*/
157#define SND_SOC_DAI_BFS_RATE 0x2
158/* use bfs rcw multiplier (BCLK = RATE * CHN * WORD SIZE) */
159#define SND_SOC_DAI_BFS_RCW 0x4
160/* capture and playback can use different clocks */
161#define SND_SOC_DAI_ASYNC 0x8
157
158/*
159 * AC97 codec ID's bitmask
160 */
161#define SND_SOC_DAI_AC97_ID0 (1 << 0)
162#define SND_SOC_DAI_AC97_ID1 (1 << 1)
163#define SND_SOC_DAI_AC97_ID2 (1 << 2)
164#define SND_SOC_DAI_AC97_ID3 (1 << 3)

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259struct snd_soc_dai_mode {
260 u16 fmt; /* SND_SOC_DAIFMT_* */
261 u16 tdm; /* SND_SOC_HWTDM_* */
262 u64 pcmfmt; /* SNDRV_PCM_FMTBIT_* */
263 u16 pcmrate; /* SND_SOC_HWRATE_* */
264 u16 pcmdir:2; /* SND_SOC_HWDIR_* */
265 u16 flags:8; /* hw flags */
266 u16 fs; /* mclk to rate divider */
162
163/*
164 * AC97 codec ID's bitmask
165 */
166#define SND_SOC_DAI_AC97_ID0 (1 << 0)
167#define SND_SOC_DAI_AC97_ID1 (1 << 1)
168#define SND_SOC_DAI_AC97_ID2 (1 << 2)
169#define SND_SOC_DAI_AC97_ID3 (1 << 3)

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264struct snd_soc_dai_mode {
265 u16 fmt; /* SND_SOC_DAIFMT_* */
266 u16 tdm; /* SND_SOC_HWTDM_* */
267 u64 pcmfmt; /* SNDRV_PCM_FMTBIT_* */
268 u16 pcmrate; /* SND_SOC_HWRATE_* */
269 u16 pcmdir:2; /* SND_SOC_HWDIR_* */
270 u16 flags:8; /* hw flags */
271 u16 fs; /* mclk to rate divider */
267 u32 bfs; /* mclk to bclk dividers */
272 u64 bfs; /* mclk to bclk dividers */
268 unsigned long priv; /* private mode data */
269};
270
271/* DAI capabilities */
272struct snd_soc_dai_cap {
273 int num_modes; /* number of DAI modes */
274 struct snd_soc_dai_mode *mode; /* array of supported DAI modes */
275};

--- 205 unchanged lines hidden --- 		273 unsigned long priv; /* private mode data */
274};
275
276/* DAI capabilities */
277struct snd_soc_dai_cap {
278 int num_modes; /* number of DAI modes */
279 struct snd_soc_dai_mode *mode; /* array of supported DAI modes */
280};

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