hci.h (426ee9e3bbc478ed9c0a079a4270f6095f0eb975) hci.h (6acd7db41dc2b6bc91b930edf21fbfd8654cbb68)
1/*
2 BlueZ - Bluetooth protocol stack for Linux
3 Copyright (C) 2000-2001 Qualcomm Incorporated
4
5 Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License version 2 as

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30#define HCI_MAX_EVENT_SIZE 260
31#define HCI_MAX_FRAME_SIZE (HCI_MAX_ACL_SIZE + 4)
32
33#define HCI_LINK_KEY_SIZE 16
34#define HCI_AMP_LINK_KEY_SIZE (2 * HCI_LINK_KEY_SIZE)
35
36#define HCI_MAX_AMP_ASSOC_SIZE 672
37
1/*
2 BlueZ - Bluetooth protocol stack for Linux
3 Copyright (C) 2000-2001 Qualcomm Incorporated
4
5 Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License version 2 as

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30#define HCI_MAX_EVENT_SIZE 260
31#define HCI_MAX_FRAME_SIZE (HCI_MAX_ACL_SIZE + 4)
32
33#define HCI_LINK_KEY_SIZE 16
34#define HCI_AMP_LINK_KEY_SIZE (2 * HCI_LINK_KEY_SIZE)
35
36#define HCI_MAX_AMP_ASSOC_SIZE 672
37
38#define HCI_MAX_CSB_DATA_SIZE 252
39
38/* HCI dev events */
39#define HCI_DEV_REG 1
40#define HCI_DEV_UNREG 2
41#define HCI_DEV_UP 3
42#define HCI_DEV_DOWN 4
43#define HCI_DEV_SUSPEND 5
44#define HCI_DEV_RESUME 6
45

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57#define HCI_PCI 5
58#define HCI_SDIO 6
59
60/* HCI controller types */
61#define HCI_BREDR 0x00
62#define HCI_AMP 0x01
63
64/* First BR/EDR Controller shall have ID = 0 */
40/* HCI dev events */
41#define HCI_DEV_REG 1
42#define HCI_DEV_UNREG 2
43#define HCI_DEV_UP 3
44#define HCI_DEV_DOWN 4
45#define HCI_DEV_SUSPEND 5
46#define HCI_DEV_RESUME 6
47

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59#define HCI_PCI 5
60#define HCI_SDIO 6
61
62/* HCI controller types */
63#define HCI_BREDR 0x00
64#define HCI_AMP 0x01
65
66/* First BR/EDR Controller shall have ID = 0 */
65#define HCI_BREDR_ID 0
67#define AMP_ID_BREDR 0x00
66
68
69/* AMP controller types */
70#define AMP_TYPE_BREDR 0x00
71#define AMP_TYPE_80211 0x01
72
67/* AMP controller status */
73/* AMP controller status */
68#define AMP_CTRL_POWERED_DOWN 0x00
69#define AMP_CTRL_BLUETOOTH_ONLY 0x01
70#define AMP_CTRL_NO_CAPACITY 0x02
71#define AMP_CTRL_LOW_CAPACITY 0x03
72#define AMP_CTRL_MEDIUM_CAPACITY 0x04
73#define AMP_CTRL_HIGH_CAPACITY 0x05
74#define AMP_CTRL_FULL_CAPACITY 0x06
74#define AMP_STATUS_POWERED_DOWN 0x00
75#define AMP_STATUS_BLUETOOTH_ONLY 0x01
76#define AMP_STATUS_NO_CAPACITY 0x02
77#define AMP_STATUS_LOW_CAPACITY 0x03
78#define AMP_STATUS_MEDIUM_CAPACITY 0x04
79#define AMP_STATUS_HIGH_CAPACITY 0x05
80#define AMP_STATUS_FULL_CAPACITY 0x06
75
76/* HCI device quirks */
77enum {
78 HCI_QUIRK_RESET_ON_CLOSE,
79 HCI_QUIRK_RAW_DEVICE,
80 HCI_QUIRK_FIXUP_BUFFER_SIZE
81};
82

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105 HCI_SETUP,
106 HCI_AUTO_OFF,
107 HCI_RFKILLED,
108 HCI_MGMT,
109 HCI_PAIRABLE,
110 HCI_SERVICE_CACHE,
111 HCI_DEBUG_KEYS,
112 HCI_UNREGISTER,
81
82/* HCI device quirks */
83enum {
84 HCI_QUIRK_RESET_ON_CLOSE,
85 HCI_QUIRK_RAW_DEVICE,
86 HCI_QUIRK_FIXUP_BUFFER_SIZE
87};
88

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111 HCI_SETUP,
112 HCI_AUTO_OFF,
113 HCI_RFKILLED,
114 HCI_MGMT,
115 HCI_PAIRABLE,
116 HCI_SERVICE_CACHE,
117 HCI_DEBUG_KEYS,
118 HCI_UNREGISTER,
119 HCI_USER_CHANNEL,
113
114 HCI_LE_SCAN,
115 HCI_SSP_ENABLED,
116 HCI_HS_ENABLED,
117 HCI_LE_ENABLED,
120
121 HCI_LE_SCAN,
122 HCI_SSP_ENABLED,
123 HCI_HS_ENABLED,
124 HCI_LE_ENABLED,
118 HCI_LE_PERIPHERAL,
125 HCI_ADVERTISING,
119 HCI_CONNECTABLE,
120 HCI_DISCOVERABLE,
126 HCI_CONNECTABLE,
127 HCI_DISCOVERABLE,
128 HCI_LIMITED_DISCOVERABLE,
121 HCI_LINK_SECURITY,
122 HCI_PERIODIC_INQ,
123 HCI_FAST_CONNECTABLE,
129 HCI_LINK_SECURITY,
130 HCI_PERIODIC_INQ,
131 HCI_FAST_CONNECTABLE,
132 HCI_BREDR_ENABLED,
124};
125
126/* A mask for the flags that are supposed to remain when a reset happens
127 * or the HCI device is closed.
128 */
129#define HCI_PERSISTENT_MASK (BIT(HCI_LE_SCAN) | BIT(HCI_PERIODIC_INQ) | \
130 BIT(HCI_FAST_CONNECTABLE))
131

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619} __packed;
620
621struct hci_rp_logical_link_cancel {
622 __u8 status;
623 __u8 phy_handle;
624 __u8 flow_spec_id;
625} __packed;
626
133};
134
135/* A mask for the flags that are supposed to remain when a reset happens
136 * or the HCI device is closed.
137 */
138#define HCI_PERSISTENT_MASK (BIT(HCI_LE_SCAN) | BIT(HCI_PERIODIC_INQ) | \
139 BIT(HCI_FAST_CONNECTABLE))
140

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628} __packed;
629
630struct hci_rp_logical_link_cancel {
631 __u8 status;
632 __u8 phy_handle;
633 __u8 flow_spec_id;
634} __packed;
635
636#define HCI_OP_SET_CSB 0x0441
637struct hci_cp_set_csb {
638 __u8 enable;
639 __u8 lt_addr;
640 __u8 lpo_allowed;
641 __le16 packet_type;
642 __le16 interval_min;
643 __le16 interval_max;
644 __le16 csb_sv_tout;
645} __packed;
646struct hci_rp_set_csb {
647 __u8 status;
648 __u8 lt_addr;
649 __le16 interval;
650} __packed;
651
652#define HCI_OP_START_SYNC_TRAIN 0x0443
653
627#define HCI_OP_SNIFF_MODE 0x0803
628struct hci_cp_sniff_mode {
629 __le16 handle;
630 __le16 max_interval;
631 __le16 min_interval;
632 __le16 attempt;
633 __le16 timeout;
634} __packed;

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689struct hci_cp_sniff_subrate {
690 __le16 handle;
691 __le16 max_latency;
692 __le16 min_remote_timeout;
693 __le16 min_local_timeout;
694} __packed;
695
696#define HCI_OP_SET_EVENT_MASK 0x0c01
654#define HCI_OP_SNIFF_MODE 0x0803
655struct hci_cp_sniff_mode {
656 __le16 handle;
657 __le16 max_interval;
658 __le16 min_interval;
659 __le16 attempt;
660 __le16 timeout;
661} __packed;

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716struct hci_cp_sniff_subrate {
717 __le16 handle;
718 __le16 max_latency;
719 __le16 min_remote_timeout;
720 __le16 min_local_timeout;
721} __packed;
722
723#define HCI_OP_SET_EVENT_MASK 0x0c01
697struct hci_cp_set_event_mask {
698 __u8 mask[8];
699} __packed;
700
701#define HCI_OP_RESET 0x0c03
702
703#define HCI_OP_SET_EVENT_FLT 0x0c05
704struct hci_cp_set_event_flt {
705 __u8 flt_type;
706 __u8 cond_type;
707 __u8 condition[0];

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787#define HCI_OP_HOST_BUFFER_SIZE 0x0c33
788struct hci_cp_host_buffer_size {
789 __le16 acl_mtu;
790 __u8 sco_mtu;
791 __le16 acl_max_pkt;
792 __le16 sco_max_pkt;
793} __packed;
794
724
725#define HCI_OP_RESET 0x0c03
726
727#define HCI_OP_SET_EVENT_FLT 0x0c05
728struct hci_cp_set_event_flt {
729 __u8 flt_type;
730 __u8 cond_type;
731 __u8 condition[0];

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811#define HCI_OP_HOST_BUFFER_SIZE 0x0c33
812struct hci_cp_host_buffer_size {
813 __le16 acl_mtu;
814 __u8 sco_mtu;
815 __le16 acl_max_pkt;
816 __le16 sco_max_pkt;
817} __packed;
818
819#define HCI_OP_READ_NUM_SUPPORTED_IAC 0x0c38
820struct hci_rp_read_num_supported_iac {
821 __u8 status;
822 __u8 num_iac;
823} __packed;
824
825#define HCI_OP_READ_CURRENT_IAC_LAP 0x0c39
826
795#define HCI_OP_WRITE_INQUIRY_MODE 0x0c45
796
797#define HCI_MAX_EIR_LENGTH 240
798
799#define HCI_OP_WRITE_EIR 0x0c52
800struct hci_cp_write_eir {
801 __u8 fec;
802 __u8 data[HCI_MAX_EIR_LENGTH];

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821} __packed;
822
823#define HCI_OP_READ_INQ_RSP_TX_POWER 0x0c58
824struct hci_rp_read_inq_rsp_tx_power {
825 __u8 status;
826 __s8 tx_power;
827} __packed;
828
827#define HCI_OP_WRITE_INQUIRY_MODE 0x0c45
828
829#define HCI_MAX_EIR_LENGTH 240
830
831#define HCI_OP_WRITE_EIR 0x0c52
832struct hci_cp_write_eir {
833 __u8 fec;
834 __u8 data[HCI_MAX_EIR_LENGTH];

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853} __packed;
854
855#define HCI_OP_READ_INQ_RSP_TX_POWER 0x0c58
856struct hci_rp_read_inq_rsp_tx_power {
857 __u8 status;
858 __s8 tx_power;
859} __packed;
860
861#define HCI_OP_SET_EVENT_MASK_PAGE_2 0x0c63
862
863#define HCI_OP_READ_LOCATION_DATA 0x0c64
864
829#define HCI_OP_READ_FLOW_CONTROL_MODE 0x0c66
830struct hci_rp_read_flow_control_mode {
831 __u8 status;
832 __u8 mode;
833} __packed;
834
835#define HCI_OP_WRITE_LE_HOST_SUPPORTED 0x0c6d
836struct hci_cp_write_le_host_supported {
837 __u8 le;
838 __u8 simul;
839} __packed;
840
865#define HCI_OP_READ_FLOW_CONTROL_MODE 0x0c66
866struct hci_rp_read_flow_control_mode {
867 __u8 status;
868 __u8 mode;
869} __packed;
870
871#define HCI_OP_WRITE_LE_HOST_SUPPORTED 0x0c6d
872struct hci_cp_write_le_host_supported {
873 __u8 le;
874 __u8 simul;
875} __packed;
876
877#define HCI_OP_SET_RESERVED_LT_ADDR 0x0c74
878struct hci_cp_set_reserved_lt_addr {
879 __u8 lt_addr;
880} __packed;
881struct hci_rp_set_reserved_lt_addr {
882 __u8 status;
883 __u8 lt_addr;
884} __packed;
885
886#define HCI_OP_DELETE_RESERVED_LT_ADDR 0x0c75
887struct hci_cp_delete_reserved_lt_addr {
888 __u8 lt_addr;
889} __packed;
890struct hci_rp_delete_reserved_lt_addr {
891 __u8 status;
892 __u8 lt_addr;
893} __packed;
894
895#define HCI_OP_SET_CSB_DATA 0x0c76
896struct hci_cp_set_csb_data {
897 __u8 lt_addr;
898 __u8 fragment;
899 __u8 data_length;
900 __u8 data[HCI_MAX_CSB_DATA_SIZE];
901} __packed;
902struct hci_rp_set_csb_data {
903 __u8 status;
904 __u8 lt_addr;
905} __packed;
906
907#define HCI_OP_READ_SYNC_TRAIN_PARAMS 0x0c77
908
909#define HCI_OP_WRITE_SYNC_TRAIN_PARAMS 0x0c78
910struct hci_cp_write_sync_train_params {
911 __le16 interval_min;
912 __le16 interval_max;
913 __le32 sync_train_tout;
914 __u8 service_data;
915} __packed;
916struct hci_rp_write_sync_train_params {
917 __u8 status;
918 __le16 sync_train_int;
919} __packed;
920
841#define HCI_OP_READ_LOCAL_VERSION 0x1001
842struct hci_rp_read_local_version {
843 __u8 status;
844 __u8 hci_ver;
845 __le16 hci_rev;
846 __u8 lmp_ver;
847 __le16 manufacturer;
848 __le16 lmp_subver;

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970} __packed;
971
972#define HCI_OP_LE_READ_LOCAL_FEATURES 0x2003
973struct hci_rp_le_read_local_features {
974 __u8 status;
975 __u8 features[8];
976} __packed;
977
921#define HCI_OP_READ_LOCAL_VERSION 0x1001
922struct hci_rp_read_local_version {
923 __u8 status;
924 __u8 hci_ver;
925 __le16 hci_rev;
926 __u8 lmp_ver;
927 __le16 manufacturer;
928 __le16 lmp_subver;

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1050} __packed;
1051
1052#define HCI_OP_LE_READ_LOCAL_FEATURES 0x2003
1053struct hci_rp_le_read_local_features {
1054 __u8 status;
1055 __u8 features[8];
1056} __packed;
1057
1058#define HCI_OP_LE_SET_RANDOM_ADDR 0x2005
1059
1060#define LE_ADV_IND 0x00
1061#define LE_ADV_DIRECT_IND 0x01
1062#define LE_ADV_SCAN_IND 0x02
1063#define LE_ADV_NONCONN_IND 0x03
1064
1065#define HCI_OP_LE_SET_ADV_PARAM 0x2006
1066struct hci_cp_le_set_adv_param {
1067 __le16 min_interval;
1068 __le16 max_interval;
1069 __u8 type;
1070 __u8 own_address_type;
1071 __u8 direct_addr_type;
1072 bdaddr_t direct_addr;
1073 __u8 channel_map;
1074 __u8 filter_policy;
1075} __packed;
1076
978#define HCI_OP_LE_READ_ADV_TX_POWER 0x2007
979struct hci_rp_le_read_adv_tx_power {
980 __u8 status;
981 __s8 tx_power;
982} __packed;
983
984#define HCI_MAX_AD_LENGTH 31
985

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1433} __packed;
1434
1435struct hci_ev_num_comp_blocks {
1436 __le16 num_blocks;
1437 __u8 num_hndl;
1438 struct hci_comp_blocks_info handles[0];
1439} __packed;
1440
1077#define HCI_OP_LE_READ_ADV_TX_POWER 0x2007
1078struct hci_rp_le_read_adv_tx_power {
1079 __u8 status;
1080 __s8 tx_power;
1081} __packed;
1082
1083#define HCI_MAX_AD_LENGTH 31
1084

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1532} __packed;
1533
1534struct hci_ev_num_comp_blocks {
1535 __le16 num_blocks;
1536 __u8 num_hndl;
1537 struct hci_comp_blocks_info handles[0];
1538} __packed;
1539
1540#define HCI_EV_SYNC_TRAIN_COMPLETE 0x4F
1541struct hci_ev_sync_train_complete {
1542 __u8 status;
1543} __packed;
1544
1545#define HCI_EV_SLAVE_PAGE_RESP_TIMEOUT 0x54
1546
1441/* Low energy meta events */
1442#define LE_CONN_ROLE_MASTER 0x00
1443
1444#define HCI_EV_LE_CONN_COMPLETE 0x01
1445struct hci_ev_le_conn_complete {
1446 __u8 status;
1447 __le16 handle;
1448 __u8 role;

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1566struct sockaddr_hci {
1567 sa_family_t hci_family;
1568 unsigned short hci_dev;
1569 unsigned short hci_channel;
1570};
1571#define HCI_DEV_NONE 0xffff
1572
1573#define HCI_CHANNEL_RAW 0
1547/* Low energy meta events */
1548#define LE_CONN_ROLE_MASTER 0x00
1549
1550#define HCI_EV_LE_CONN_COMPLETE 0x01
1551struct hci_ev_le_conn_complete {
1552 __u8 status;
1553 __le16 handle;
1554 __u8 role;

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1672struct sockaddr_hci {
1673 sa_family_t hci_family;
1674 unsigned short hci_dev;
1675 unsigned short hci_channel;
1676};
1677#define HCI_DEV_NONE 0xffff
1678
1679#define HCI_CHANNEL_RAW 0
1680#define HCI_CHANNEL_USER 1
1574#define HCI_CHANNEL_MONITOR 2
1575#define HCI_CHANNEL_CONTROL 3
1576
1577struct hci_filter {
1578 unsigned long type_mask;
1579 unsigned long event_mask[2];
1580 __le16 opcode;
1581};

--- 97 unchanged lines hidden --- 		1681#define HCI_CHANNEL_MONITOR 2
1682#define HCI_CHANNEL_CONTROL 3
1683
1684struct hci_filter {
1685 unsigned long type_mask;
1686 unsigned long event_mask[2];
1687 __le16 opcode;
1688};

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