rt2880_wdt.c (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) | rt2880_wdt.c (76ad36bf0ea620b14d32a332108a248412886d54) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer 4 * 5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 6 * Copyright (C) 2013 John Crispin <john@phrozen.org> 7 * 8 * This driver was based on: drivers/watchdog/softdog.c --- 26 unchanged lines hidden (view full) --- 35#define TMR1CTL_MODE_MASK 0x3 36#define TMR1CTL_MODE_FREE_RUNNING 0x0 37#define TMR1CTL_MODE_PERIODIC 0x1 38#define TMR1CTL_MODE_TIMEOUT 0x2 39#define TMR1CTL_MODE_WDT 0x3 40#define TMR1CTL_PRESCALE_MASK 0xf 41#define TMR1CTL_PRESCALE_65536 0xf 42 | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer 4 * 5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 6 * Copyright (C) 2013 John Crispin <john@phrozen.org> 7 * 8 * This driver was based on: drivers/watchdog/softdog.c --- 26 unchanged lines hidden (view full) --- 35#define TMR1CTL_MODE_MASK 0x3 36#define TMR1CTL_MODE_FREE_RUNNING 0x0 37#define TMR1CTL_MODE_PERIODIC 0x1 38#define TMR1CTL_MODE_TIMEOUT 0x2 39#define TMR1CTL_MODE_WDT 0x3 40#define TMR1CTL_PRESCALE_MASK 0xf 41#define TMR1CTL_PRESCALE_65536 0xf 42 |
43static struct clk *rt288x_wdt_clk; 44static unsigned long rt288x_wdt_freq; 45static void __iomem *rt288x_wdt_base; 46static struct reset_control *rt288x_wdt_reset; | 43struct rt2880_wdt_data { 44 void __iomem *base; 45 unsigned long freq; 46 struct clk *clk; 47 struct reset_control *rst; 48 struct watchdog_device wdt; 49}; |
47 48static bool nowayout = WATCHDOG_NOWAYOUT; 49module_param(nowayout, bool, 0); 50MODULE_PARM_DESC(nowayout, 51 "Watchdog cannot be stopped once started (default=" 52 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 53 | 50 51static bool nowayout = WATCHDOG_NOWAYOUT; 52module_param(nowayout, bool, 0); 53MODULE_PARM_DESC(nowayout, 54 "Watchdog cannot be stopped once started (default=" 55 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 56 |
54static inline void rt_wdt_w32(unsigned reg, u32 val) | 57static inline void rt_wdt_w32(void __iomem *base, unsigned reg, u32 val) |
55{ | 58{ |
56 iowrite32(val, rt288x_wdt_base + reg); | 59 iowrite32(val, base + reg); |
57} 58 | 60} 61 |
59static inline u32 rt_wdt_r32(unsigned reg) | 62static inline u32 rt_wdt_r32(void __iomem *base, unsigned reg) |
60{ | 63{ |
61 return ioread32(rt288x_wdt_base + reg); | 64 return ioread32(base + reg); |
62} 63 64static int rt288x_wdt_ping(struct watchdog_device *w) 65{ | 65} 66 67static int rt288x_wdt_ping(struct watchdog_device *w) 68{ |
66 rt_wdt_w32(TIMER_REG_TMR1LOAD, w->timeout * rt288x_wdt_freq); | 69 struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w); |
67 | 70 |
71 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1LOAD, w->timeout * drvdata->freq); 72 |
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68 return 0; 69} 70 71static int rt288x_wdt_start(struct watchdog_device *w) 72{ | 73 return 0; 74} 75 76static int rt288x_wdt_start(struct watchdog_device *w) 77{ |
78 struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w); |
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73 u32 t; 74 | 79 u32 t; 80 |
75 t = rt_wdt_r32(TIMER_REG_TMR1CTL); | 81 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL); |
76 t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT | 77 TMR1CTL_PRESCALE_MASK); 78 t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT | 79 TMR1CTL_PRESCALE_65536); | 82 t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT | 83 TMR1CTL_PRESCALE_MASK); 84 t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT | 85 TMR1CTL_PRESCALE_65536); |
80 rt_wdt_w32(TIMER_REG_TMR1CTL, t); | 86 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t); |
81 82 rt288x_wdt_ping(w); 83 | 87 88 rt288x_wdt_ping(w); 89 |
84 t = rt_wdt_r32(TIMER_REG_TMR1CTL); | 90 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL); |
85 t |= TMR1CTL_ENABLE; | 91 t |= TMR1CTL_ENABLE; |
86 rt_wdt_w32(TIMER_REG_TMR1CTL, t); | 92 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t); |
87 88 return 0; 89} 90 91static int rt288x_wdt_stop(struct watchdog_device *w) 92{ | 93 94 return 0; 95} 96 97static int rt288x_wdt_stop(struct watchdog_device *w) 98{ |
99 struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w); |
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93 u32 t; 94 95 rt288x_wdt_ping(w); 96 | 100 u32 t; 101 102 rt288x_wdt_ping(w); 103 |
97 t = rt_wdt_r32(TIMER_REG_TMR1CTL); | 104 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL); |
98 t &= ~TMR1CTL_ENABLE; | 105 t &= ~TMR1CTL_ENABLE; |
99 rt_wdt_w32(TIMER_REG_TMR1CTL, t); | 106 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t); |
100 101 return 0; 102} 103 104static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t) 105{ 106 w->timeout = t; 107 rt288x_wdt_ping(w); --- 17 unchanged lines hidden (view full) --- 125static const struct watchdog_ops rt288x_wdt_ops = { 126 .owner = THIS_MODULE, 127 .start = rt288x_wdt_start, 128 .stop = rt288x_wdt_stop, 129 .ping = rt288x_wdt_ping, 130 .set_timeout = rt288x_wdt_set_timeout, 131}; 132 | 107 108 return 0; 109} 110 111static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t) 112{ 113 w->timeout = t; 114 rt288x_wdt_ping(w); --- 17 unchanged lines hidden (view full) --- 132static const struct watchdog_ops rt288x_wdt_ops = { 133 .owner = THIS_MODULE, 134 .start = rt288x_wdt_start, 135 .stop = rt288x_wdt_stop, 136 .ping = rt288x_wdt_ping, 137 .set_timeout = rt288x_wdt_set_timeout, 138}; 139 |
133static struct watchdog_device rt288x_wdt_dev = { 134 .info = &rt288x_wdt_info, 135 .ops = &rt288x_wdt_ops, 136 .min_timeout = 1, 137}; 138 | |
139static int rt288x_wdt_probe(struct platform_device *pdev) 140{ 141 struct device *dev = &pdev->dev; | 140static int rt288x_wdt_probe(struct platform_device *pdev) 141{ 142 struct device *dev = &pdev->dev; |
143 struct watchdog_device *wdt; 144 struct rt2880_wdt_data *drvdata; |
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142 int ret; 143 | 145 int ret; 146 |
144 rt288x_wdt_base = devm_platform_ioremap_resource(pdev, 0); 145 if (IS_ERR(rt288x_wdt_base)) 146 return PTR_ERR(rt288x_wdt_base); | 147 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 148 if (!drvdata) 149 return -ENOMEM; |
147 | 150 |
148 rt288x_wdt_clk = devm_clk_get(dev, NULL); 149 if (IS_ERR(rt288x_wdt_clk)) 150 return PTR_ERR(rt288x_wdt_clk); | 151 drvdata->base = devm_platform_ioremap_resource(pdev, 0); 152 if (IS_ERR(drvdata->base)) 153 return PTR_ERR(drvdata->base); |
151 | 154 |
152 rt288x_wdt_reset = devm_reset_control_get_exclusive(dev, NULL); 153 if (!IS_ERR(rt288x_wdt_reset)) 154 reset_control_deassert(rt288x_wdt_reset); | 155 drvdata->clk = devm_clk_get(dev, NULL); 156 if (IS_ERR(drvdata->clk)) 157 return PTR_ERR(drvdata->clk); |
155 | 158 |
156 rt288x_wdt_freq = clk_get_rate(rt288x_wdt_clk) / RALINK_WDT_PRESCALE; | 159 drvdata->rst = devm_reset_control_get_exclusive(dev, NULL); 160 if (!IS_ERR(drvdata->rst)) 161 reset_control_deassert(drvdata->rst); |
157 | 162 |
158 rt288x_wdt_dev.bootstatus = rt288x_wdt_bootcause(); 159 rt288x_wdt_dev.max_timeout = (0xfffful / rt288x_wdt_freq); 160 rt288x_wdt_dev.parent = dev; | 163 drvdata->freq = clk_get_rate(drvdata->clk) / RALINK_WDT_PRESCALE; |
161 | 164 |
162 watchdog_init_timeout(&rt288x_wdt_dev, rt288x_wdt_dev.max_timeout, 163 dev); 164 watchdog_set_nowayout(&rt288x_wdt_dev, nowayout); | 165 wdt = &drvdata->wdt; 166 wdt->info = &rt288x_wdt_info; 167 wdt->ops = &rt288x_wdt_ops; 168 wdt->min_timeout = 1; 169 wdt->max_timeout = (0xfffful / drvdata->freq); 170 wdt->parent = dev; 171 wdt->bootstatus = rt288x_wdt_bootcause(); |
165 | 172 |
166 watchdog_stop_on_reboot(&rt288x_wdt_dev); 167 ret = devm_watchdog_register_device(dev, &rt288x_wdt_dev); | 173 watchdog_init_timeout(wdt, wdt->max_timeout, dev); 174 watchdog_set_nowayout(wdt, nowayout); 175 watchdog_set_drvdata(wdt, drvdata); 176 177 watchdog_stop_on_reboot(wdt); 178 ret = devm_watchdog_register_device(dev, &drvdata->wdt); |
168 if (!ret) 169 dev_info(dev, "Initialized\n"); 170 171 return 0; 172} 173 174static const struct of_device_id rt288x_wdt_match[] = { 175 { .compatible = "ralink,rt2880-wdt" }, --- 17 unchanged lines hidden --- | 179 if (!ret) 180 dev_info(dev, "Initialized\n"); 181 182 return 0; 183} 184 185static const struct of_device_id rt288x_wdt_match[] = { 186 { .compatible = "ralink,rt2880-wdt" }, --- 17 unchanged lines hidden --- |