| stm32-usart.h (f81483aaeb59da530b286fe5d081e1705eb5c886) | stm32-usart.h (9a135f16d228857c5c1212a58050196883343d1e) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) Maxime Coquelin 2015 4 * Copyright (C) STMicroelectronics SA 2017 5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com> 6 * Gerald Baeza <gerald_baeza@yahoo.fr> 7 */ 8 --- 250 unchanged lines hidden (view full) --- 259 dma_addr_t rx_dma_buf; /* dma rx buffer bus address */ 260 unsigned char *rx_buf; /* dma rx buffer cpu address */ 261 struct dma_chan *tx_ch; /* dma tx channel */ 262 dma_addr_t tx_dma_buf; /* dma tx buffer bus address */ 263 unsigned char *tx_buf; /* dma tx buffer cpu address */ 264 u32 cr1_irq; /* USART_CR1_RXNEIE or RTOIE */ 265 u32 cr3_irq; /* USART_CR3_RXFTIE */ 266 int last_res; | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) Maxime Coquelin 2015 4 * Copyright (C) STMicroelectronics SA 2017 5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com> 6 * Gerald Baeza <gerald_baeza@yahoo.fr> 7 */ 8 --- 250 unchanged lines hidden (view full) --- 259 dma_addr_t rx_dma_buf; /* dma rx buffer bus address */ 260 unsigned char *rx_buf; /* dma rx buffer cpu address */ 261 struct dma_chan *tx_ch; /* dma tx channel */ 262 dma_addr_t tx_dma_buf; /* dma tx buffer bus address */ 263 unsigned char *tx_buf; /* dma tx buffer cpu address */ 264 u32 cr1_irq; /* USART_CR1_RXNEIE or RTOIE */ 265 u32 cr3_irq; /* USART_CR3_RXFTIE */ 266 int last_res; |
| 267 bool tx_dma_busy; /* dma tx busy */ | 267 bool tx_dma_busy; /* dma tx transaction in progress */ |
| 268 bool throttled; /* port throttled */ 269 bool hw_flow_control; 270 bool swap; /* swap RX & TX pins */ 271 bool fifoen; 272 int rxftcfg; /* RX FIFO threshold CFG */ 273 int txftcfg; /* TX FIFO threshold CFG */ 274 bool wakeup_src; 275 int rdr_mask; /* receive data register mask */ 276 struct mctrl_gpios *gpios; /* modem control gpios */ 277 struct dma_tx_state rx_dma_state; 278}; 279 280static struct stm32_port stm32_ports[STM32_MAX_PORTS]; 281static struct uart_driver stm32_usart_driver; | 268 bool throttled; /* port throttled */ 269 bool hw_flow_control; 270 bool swap; /* swap RX & TX pins */ 271 bool fifoen; 272 int rxftcfg; /* RX FIFO threshold CFG */ 273 int txftcfg; /* TX FIFO threshold CFG */ 274 bool wakeup_src; 275 int rdr_mask; /* receive data register mask */ 276 struct mctrl_gpios *gpios; /* modem control gpios */ 277 struct dma_tx_state rx_dma_state; 278}; 279 280static struct stm32_port stm32_ports[STM32_MAX_PORTS]; 281static struct uart_driver stm32_usart_driver; |