stm32-usart.c (7d7ae873b5e0f46d19e5dc818d1a7809e4b7cc81) stm32-usart.c (3e3578ca1b877a49a7521e600d51658d6d794267)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) Maxime Coquelin 2015
4 * Copyright (C) STMicroelectronics SA 2017
5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Gerald Baeza <gerald.baeza@foss.st.com>
7 * Erwan Le Ray <erwan.leray@foss.st.com>
8 *

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246 if (rs485conf->flags & SER_RS485_RTS_ON_SEND)
247 cr3 &= ~USART_CR3_DEP;
248 else
249 cr3 |= USART_CR3_DEP;
250
251 writel_relaxed(cr3, port->membase + ofs->cr3);
252 writel_relaxed(cr1, port->membase + ofs->cr1);
253
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) Maxime Coquelin 2015
4 * Copyright (C) STMicroelectronics SA 2017
5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Gerald Baeza <gerald.baeza@foss.st.com>
7 * Erwan Le Ray <erwan.leray@foss.st.com>
8 *

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246 if (rs485conf->flags & SER_RS485_RTS_ON_SEND)
247 cr3 &= ~USART_CR3_DEP;
248 else
249 cr3 |= USART_CR3_DEP;
250
251 writel_relaxed(cr3, port->membase + ofs->cr3);
252 writel_relaxed(cr1, port->membase + ofs->cr1);
253
254 rs485conf->flags |= SER_RS485_RX_DURING_TX;
254 if (!port->rs485_rx_during_tx_gpio)
255 rs485conf->flags |= SER_RS485_RX_DURING_TX;
256
255 } else {
256 stm32_usart_clr_bits(port, ofs->cr3,
257 USART_CR3_DEM | USART_CR3_DEP);
258 stm32_usart_clr_bits(port, ofs->cr1,
259 USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
260 }
261
262 stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));

--- 1909 unchanged lines hidden --- 		257 } else {
258 stm32_usart_clr_bits(port, ofs->cr3,
259 USART_CR3_DEM | USART_CR3_DEP);
260 stm32_usart_clr_bits(port, ofs->cr1,
261 USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
262 }
263
264 stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));

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