stm32-usart.c (61b7369483efb5e0a9f3b48e75fac00d46d661e0) stm32-usart.c (fd2b55f86b8b25afc5b6e7dff53dddb3fd0dd211)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) Maxime Coquelin 2015
4 * Copyright (C) STMicroelectronics SA 2017
5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Gerald Baeza <gerald.baeza@foss.st.com>
7 * Erwan Le Ray <erwan.leray@foss.st.com>
8 *

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316 /* Handle only RX data errors when using DMA */
317 if (*sr & USART_SR_ERR_MASK)
318 return true;
319 }
320
321 return false;
322}
323
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) Maxime Coquelin 2015
4 * Copyright (C) STMicroelectronics SA 2017
5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Gerald Baeza <gerald.baeza@foss.st.com>
7 * Erwan Le Ray <erwan.leray@foss.st.com>
8 *

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316 /* Handle only RX data errors when using DMA */
317 if (*sr & USART_SR_ERR_MASK)
318 return true;
319 }
320
321 return false;
322}
323
324static unsigned long stm32_usart_get_char_pio(struct uart_port *port)
324static u8 stm32_usart_get_char_pio(struct uart_port *port)
325{
326 struct stm32_port *stm32_port = to_stm32_port(port);
327 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
328 unsigned long c;
329
330 c = readl_relaxed(port->membase + ofs->rdr);
331 /* Apply RDR data mask */
332 c &= stm32_port->rdr_mask;
333
334 return c;
335}
336
337static unsigned int stm32_usart_receive_chars_pio(struct uart_port *port)
338{
339 struct stm32_port *stm32_port = to_stm32_port(port);
340 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
325{
326 struct stm32_port *stm32_port = to_stm32_port(port);
327 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
328 unsigned long c;
329
330 c = readl_relaxed(port->membase + ofs->rdr);
331 /* Apply RDR data mask */
332 c &= stm32_port->rdr_mask;
333
334 return c;
335}
336
337static unsigned int stm32_usart_receive_chars_pio(struct uart_port *port)
338{
339 struct stm32_port *stm32_port = to_stm32_port(port);
340 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
341 unsigned long c;
342 unsigned int size = 0;
343 u32 sr;
341 unsigned int size = 0;
342 u32 sr;
344 char flag;
343 u8 c, flag;
345
346 while (stm32_usart_pending_rx_pio(port, &sr)) {
347 sr |= USART_SR_DUMMY_RX;
348 flag = TTY_NORMAL;
349
350 /*
351 * Status bits has to be cleared before reading the RDR:
352 * In FIFO mode, reading the RDR will pop the next data

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345 while (stm32_usart_pending_rx_pio(port, &sr)) {
346 sr |= USART_SR_DUMMY_RX;
347 flag = TTY_NORMAL;
348
349 /*
350 * Status bits has to be cleared before reading the RDR:
351 * In FIFO mode, reading the RDR will pop the next data

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