tb.c (8a90e4fa3b4d6a10c96b0a04abf57bb5a16a8f4e) tb.c (43f977bc60b1cfd3c1d220a9a0a06493fbf3985d)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Thunderbolt driver - bus logic (NHI independent)
4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2019, Intel Corporation
7 */
8

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1087
1088 if (tb_tunnel_activate(tunnel)) {
1089 tb_port_info(up,
1090 "PCIe tunnel activation failed, aborting\n");
1091 tb_tunnel_free(tunnel);
1092 return -EIO;
1093 }
1094
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Thunderbolt driver - bus logic (NHI independent)
4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2019, Intel Corporation
7 */
8

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1087
1088 if (tb_tunnel_activate(tunnel)) {
1089 tb_port_info(up,
1090 "PCIe tunnel activation failed, aborting\n");
1091 tb_tunnel_free(tunnel);
1092 return -EIO;
1093 }
1094
1095 /*
1096 * PCIe L1 is needed to enable CL0s for Titan Ridge so enable it
1097 * here.
1098 */
1099 if (tb_switch_pcie_l1_enable(sw))
1100 tb_sw_warn(sw, "failed to enable PCIe L1 for Titan Ridge\n");
1101
1095 list_add_tail(&tunnel->list, &tcm->tunnel_list);
1096 return 0;
1097}
1098
1099static int tb_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
1100 int transmit_path, int transmit_ring,
1101 int receive_path, int receive_ring)
1102{

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1102 list_add_tail(&tunnel->list, &tcm->tunnel_list);
1103 return 0;
1104}
1105
1106static int tb_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
1107 int transmit_path, int transmit_ring,
1108 int receive_path, int receive_ring)
1109{

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