spi-rockchip.c (b8d423711d1870c5e1280d5bbb0639fe6638a60e) spi-rockchip.c (736b81e075172f1e6cd7a8bc1a1374a2dee9e4dc)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * Author: Addy Ke <addy.ke@rock-chips.com>
5 */
6
7#include <linux/clk.h>
8#include <linux/dmaengine.h>

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102#define CR0_XFM_TR 0x0
103#define CR0_XFM_TO 0x1
104#define CR0_XFM_RO 0x2
105
106#define CR0_OPM_OFFSET 20
107#define CR0_OPM_MASTER 0x0
108#define CR0_OPM_SLAVE 0x1
109
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * Author: Addy Ke <addy.ke@rock-chips.com>
5 */
6
7#include <linux/clk.h>
8#include <linux/dmaengine.h>

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102#define CR0_XFM_TR 0x0
103#define CR0_XFM_TO 0x1
104#define CR0_XFM_RO 0x2
105
106#define CR0_OPM_OFFSET 20
107#define CR0_OPM_MASTER 0x0
108#define CR0_OPM_SLAVE 0x1
109
110#define CR0_SOI_OFFSET 23
111
110#define CR0_MTM_OFFSET 0x21
111
112/* Bit fields in SER, 2bit */
113#define SER_MASK 0x3
114
115/* Bit fields in BAUDR */
116#define BAUDR_SCKDV_MIN 2
117#define BAUDR_SCKDV_MAX 65534

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231 return 32;
232 }
233}
234
235static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
236{
237 struct spi_controller *ctlr = spi->controller;
238 struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
112#define CR0_MTM_OFFSET 0x21
113
114/* Bit fields in SER, 2bit */
115#define SER_MASK 0x3
116
117/* Bit fields in BAUDR */
118#define BAUDR_SCKDV_MIN 2
119#define BAUDR_SCKDV_MAX 65534

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233 return 32;
234 }
235}
236
237static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
238{
239 struct spi_controller *ctlr = spi->controller;
240 struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
239 bool cs_asserted = !enable;
241 bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable;
240
241 /* Return immediately for no-op */
242 if (cs_asserted == rs->cs_asserted[spi->chip_select])
243 return;
244
245 if (cs_asserted) {
246 /* Keep things powered as long as CS is asserted */
247 pm_runtime_get_sync(rs->dev);

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502 if (slave_mode)
503 cr0 |= CR0_OPM_SLAVE << CR0_OPM_OFFSET;
504 rs->slave_abort = false;
505
506 cr0 |= rs->rsd << CR0_RSD_OFFSET;
507 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
508 if (spi->mode & SPI_LSB_FIRST)
509 cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;
242
243 /* Return immediately for no-op */
244 if (cs_asserted == rs->cs_asserted[spi->chip_select])
245 return;
246
247 if (cs_asserted) {
248 /* Keep things powered as long as CS is asserted */
249 pm_runtime_get_sync(rs->dev);

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504 if (slave_mode)
505 cr0 |= CR0_OPM_SLAVE << CR0_OPM_OFFSET;
506 rs->slave_abort = false;
507
508 cr0 |= rs->rsd << CR0_RSD_OFFSET;
509 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
510 if (spi->mode & SPI_LSB_FIRST)
511 cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;
512 if (spi->mode & SPI_CS_HIGH)
513 cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET;
510
511 if (xfer->rx_buf && xfer->tx_buf)
512 cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
513 else if (xfer->rx_buf)
514 cr0 |= CR0_XFM_RO << CR0_XFM_OFFSET;
515 else if (use_dma)
516 cr0 |= CR0_XFM_TO << CR0_XFM_OFFSET;
517

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790 }
791
792 if (ctlr->dma_tx && ctlr->dma_rx) {
793 rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR;
794 rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR;
795 ctlr->can_dma = rockchip_spi_can_dma;
796 }
797
514
515 if (xfer->rx_buf && xfer->tx_buf)
516 cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
517 else if (xfer->rx_buf)
518 cr0 |= CR0_XFM_RO << CR0_XFM_OFFSET;
519 else if (use_dma)
520 cr0 |= CR0_XFM_TO << CR0_XFM_OFFSET;
521

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794 }
795
796 if (ctlr->dma_tx && ctlr->dma_rx) {
797 rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR;
798 rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR;
799 ctlr->can_dma = rockchip_spi_can_dma;
800 }
801
802 switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) {
803 case ROCKCHIP_SPI_VER2_TYPE2:
804 ctlr->mode_bits |= SPI_CS_HIGH;
805 break;
806 default:
807 break;
808 }
809
798 ret = devm_spi_register_controller(&pdev->dev, ctlr);
799 if (ret < 0) {
800 dev_err(&pdev->dev, "Failed to register controller\n");
801 goto err_free_dma_rx;
802 }
803
804 return 0;
805

--- 151 unchanged lines hidden --- 		810 ret = devm_spi_register_controller(&pdev->dev, ctlr);
811 if (ret < 0) {
812 dev_err(&pdev->dev, "Failed to register controller\n");
813 goto err_free_dma_rx;
814 }
815
816 return 0;
817

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