spi-rockchip.c (3a4bf922d42efa4e9a3dc803d1fd786d43e8a501) | spi-rockchip.c (e882575efc771f130a24322377dc1033551da11d) |
---|---|
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd 4 * Author: Addy Ke <addy.ke@rock-chips.com> 5 */ 6 7#include <linux/clk.h> 8#include <linux/dmaengine.h> --- 950 unchanged lines hidden (view full) --- 959 return 0; 960} 961 962#ifdef CONFIG_PM_SLEEP 963static int rockchip_spi_suspend(struct device *dev) 964{ 965 int ret; 966 struct spi_controller *ctlr = dev_get_drvdata(dev); | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd 4 * Author: Addy Ke <addy.ke@rock-chips.com> 5 */ 6 7#include <linux/clk.h> 8#include <linux/dmaengine.h> --- 950 unchanged lines hidden (view full) --- 959 return 0; 960} 961 962#ifdef CONFIG_PM_SLEEP 963static int rockchip_spi_suspend(struct device *dev) 964{ 965 int ret; 966 struct spi_controller *ctlr = dev_get_drvdata(dev); |
967 struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); |
|
967 968 ret = spi_controller_suspend(ctlr); 969 if (ret < 0) 970 return ret; 971 | 968 969 ret = spi_controller_suspend(ctlr); 970 if (ret < 0) 971 return ret; 972 |
972 ret = pm_runtime_force_suspend(dev); 973 if (ret < 0) 974 return ret; | 973 clk_disable_unprepare(rs->spiclk); 974 clk_disable_unprepare(rs->apb_pclk); |
975 976 pinctrl_pm_select_sleep_state(dev); 977 978 return 0; 979} 980 981static int rockchip_spi_resume(struct device *dev) 982{ 983 int ret; 984 struct spi_controller *ctlr = dev_get_drvdata(dev); 985 struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); 986 987 pinctrl_pm_select_default_state(dev); 988 | 975 976 pinctrl_pm_select_sleep_state(dev); 977 978 return 0; 979} 980 981static int rockchip_spi_resume(struct device *dev) 982{ 983 int ret; 984 struct spi_controller *ctlr = dev_get_drvdata(dev); 985 struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); 986 987 pinctrl_pm_select_default_state(dev); 988 |
989 ret = pm_runtime_force_resume(dev); | 989 ret = clk_prepare_enable(rs->apb_pclk); |
990 if (ret < 0) 991 return ret; 992 | 990 if (ret < 0) 991 return ret; 992 |
993 ret = clk_prepare_enable(rs->spiclk); 994 if (ret < 0) 995 clk_disable_unprepare(rs->apb_pclk); 996 |
|
993 ret = spi_controller_resume(ctlr); 994 if (ret < 0) { 995 clk_disable_unprepare(rs->spiclk); 996 clk_disable_unprepare(rs->apb_pclk); 997 } 998 999 return 0; 1000} --- 25 unchanged lines hidden (view full) --- 1026 if (ret < 0) 1027 clk_disable_unprepare(rs->apb_pclk); 1028 1029 return 0; 1030} 1031#endif /* CONFIG_PM */ 1032 1033static const struct dev_pm_ops rockchip_spi_pm = { | 997 ret = spi_controller_resume(ctlr); 998 if (ret < 0) { 999 clk_disable_unprepare(rs->spiclk); 1000 clk_disable_unprepare(rs->apb_pclk); 1001 } 1002 1003 return 0; 1004} --- 25 unchanged lines hidden (view full) --- 1030 if (ret < 0) 1031 clk_disable_unprepare(rs->apb_pclk); 1032 1033 return 0; 1034} 1035#endif /* CONFIG_PM */ 1036 1037static const struct dev_pm_ops rockchip_spi_pm = { |
1034 SET_SYSTEM_SLEEP_PM_OPS(rockchip_spi_suspend, rockchip_spi_resume) | 1038 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(rockchip_spi_suspend, rockchip_spi_resume) |
1035 SET_RUNTIME_PM_OPS(rockchip_spi_runtime_suspend, 1036 rockchip_spi_runtime_resume, NULL) 1037}; 1038 1039static const struct of_device_id rockchip_spi_dt_match[] = { 1040 { .compatible = "rockchip,px30-spi", }, 1041 { .compatible = "rockchip,rk3036-spi", }, 1042 { .compatible = "rockchip,rk3066-spi", }, --- 28 unchanged lines hidden --- | 1039 SET_RUNTIME_PM_OPS(rockchip_spi_runtime_suspend, 1040 rockchip_spi_runtime_resume, NULL) 1041}; 1042 1043static const struct of_device_id rockchip_spi_dt_match[] = { 1044 { .compatible = "rockchip,px30-spi", }, 1045 { .compatible = "rockchip,rk3036-spi", }, 1046 { .compatible = "rockchip,rk3066-spi", }, --- 28 unchanged lines hidden --- |