sun3x_esp.c (4ba24fef3eb3b142197135223b90ced2f319cd53) sun3x_esp.c (2584cf83578c26db144730ef498f4070f82ee3ea)
1/* sun3x_esp.c: ESP front-end for Sun3x systems.
2 *
3 * Copyright (C) 2007,2008 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
4 */
5
6#include <linux/kernel.h>
7#include <linux/gfp.h>
8#include <linux/types.h>
9#include <linux/delay.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/dma-mapping.h>
14#include <linux/interrupt.h>
1/* sun3x_esp.c: ESP front-end for Sun3x systems.
2 *
3 * Copyright (C) 2007,2008 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
4 */
5
6#include <linux/kernel.h>
7#include <linux/gfp.h>
8#include <linux/types.h>
9#include <linux/delay.h>
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/dma-mapping.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
15
16#include <asm/sun3x.h>
16
17#include <asm/sun3x.h>
17#include <asm/io.h>
18#include <asm/dma.h>
19#include <asm/dvma.h>
20
21/* DMA controller reg offsets */
22#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
23#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
24#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
25#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */

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18#include <asm/dma.h>
19#include <asm/dvma.h>
20
21/* DMA controller reg offsets */
22#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
23#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
24#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
25#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */

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