hpsa_cmd.h (76438d087f18fc0ce0431bf22e5195ec3db1656c) | hpsa_cmd.h (b66cc250ee700ba019ae6801726588b8bf6d9144) |
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1/* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * --- 318 unchanged lines hidden (view full) --- 327 u32 ResidualCnt; 328 union MoreErrInfo MoreErrInfo; 329 u8 SenseInfo[SENSEINFOBYTES]; 330}; 331/* Command types */ 332#define CMD_IOCTL_PEND 0x01 333#define CMD_SCSI 0x03 334#define CMD_IOACCEL1 0x04 | 1/* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * --- 318 unchanged lines hidden (view full) --- 327 u32 ResidualCnt; 328 union MoreErrInfo MoreErrInfo; 329 u8 SenseInfo[SENSEINFOBYTES]; 330}; 331/* Command types */ 332#define CMD_IOCTL_PEND 0x01 333#define CMD_SCSI 0x03 334#define CMD_IOACCEL1 0x04 |
335#define CMD_IOACCEL2 0x05 |
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335 336#define DIRECT_LOOKUP_SHIFT 5 337#define DIRECT_LOOKUP_BIT 0x10 338#define DIRECT_LOOKUP_MASK (~((1 << DIRECT_LOOKUP_SHIFT) - 1)) 339 340#define HPSA_ERROR_BIT 0x02 341struct ctlr_info; /* defined in hpsa.h */ 342/* The size of this structure needs to be divisible by 32 --- 36 unchanged lines hidden (view full) --- 379#define PAD_32 (36) 380#define PAD_64 (4) 381#define COMMANDLIST_PAD (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64) 382 u8 pad[COMMANDLIST_PAD]; 383}; 384 385/* Max S/G elements in I/O accelerator command */ 386#define IOACCEL1_MAXSGENTRIES 24 | 336 337#define DIRECT_LOOKUP_SHIFT 5 338#define DIRECT_LOOKUP_BIT 0x10 339#define DIRECT_LOOKUP_MASK (~((1 << DIRECT_LOOKUP_SHIFT) - 1)) 340 341#define HPSA_ERROR_BIT 0x02 342struct ctlr_info; /* defined in hpsa.h */ 343/* The size of this structure needs to be divisible by 32 --- 36 unchanged lines hidden (view full) --- 380#define PAD_32 (36) 381#define PAD_64 (4) 382#define COMMANDLIST_PAD (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64) 383 u8 pad[COMMANDLIST_PAD]; 384}; 385 386/* Max S/G elements in I/O accelerator command */ 387#define IOACCEL1_MAXSGENTRIES 24 |
388#define IOACCEL2_MAXSGENTRIES 28 |
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387 388/* 389 * Structure for I/O accelerator (mode 1) commands. 390 * Note that this structure must be 128-byte aligned in size. 391 */ 392struct io_accel1_cmd { 393 u16 dev_handle; /* 0x00 - 0x01 */ 394 u8 reserved1; /* 0x02 */ --- 44 unchanged lines hidden (view full) --- 439#define IOACCEL1_CONTROL_HEADOFQUEUE 0x00000100 440#define IOACCEL1_CONTROL_ORDEREDQUEUE 0x00000200 441#define IOACCEL1_CONTROL_ACA 0x00000400 442 443#define IOACCEL1_HCFLAGS_CISS_FORMAT 0x0013 444 445#define IOACCEL1_BUSADDR_CMDTYPE 0x00000060 446 | 389 390/* 391 * Structure for I/O accelerator (mode 1) commands. 392 * Note that this structure must be 128-byte aligned in size. 393 */ 394struct io_accel1_cmd { 395 u16 dev_handle; /* 0x00 - 0x01 */ 396 u8 reserved1; /* 0x02 */ --- 44 unchanged lines hidden (view full) --- 441#define IOACCEL1_CONTROL_HEADOFQUEUE 0x00000100 442#define IOACCEL1_CONTROL_ORDEREDQUEUE 0x00000200 443#define IOACCEL1_CONTROL_ACA 0x00000400 444 445#define IOACCEL1_HCFLAGS_CISS_FORMAT 0x0013 446 447#define IOACCEL1_BUSADDR_CMDTYPE 0x00000060 448 |
449struct ioaccel2_sg_element { 450 u64 address; 451 u32 length; 452 u8 reserved[3]; 453 u8 chain_indicator; 454#define IOACCEL2_CHAIN 0x80 455}; 456 457/* 458 * SCSI Response Format structure for IO Accelerator Mode 2 459 */ 460struct io_accel2_scsi_response { 461 u8 IU_type; 462#define IOACCEL2_IU_TYPE_SRF 0x60 463 u8 reserved1[3]; 464 u8 req_id[4]; /* request identifier */ 465 u8 reserved2[4]; 466 u8 serv_response; /* service response */ 467#define IOACCEL2_SERV_RESPONSE_COMPLETE 0x000 468#define IOACCEL2_SERV_RESPONSE_FAILURE 0x001 469#define IOACCEL2_SERV_RESPONSE_TMF_COMPLETE 0x002 470#define IOACCEL2_SERV_RESPONSE_TMF_SUCCESS 0x003 471#define IOACCEL2_SERV_RESPONSE_TMF_REJECTED 0x004 472#define IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN 0x005 473 u8 status; /* status */ 474#define IOACCEL2_STATUS_SR_TASK_COMP_GOOD 0x00 475#define IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND 0x02 476#define IOACCEL2_STATUS_SR_TASK_COMP_BUSY 0x08 477#define IOACCEL2_STATUS_SR_TASK_COMP_RES_CON 0x18 478#define IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL 0x28 479#define IOACCEL2_STATUS_SR_TASK_COMP_ABORTED 0x40 480 u8 data_present; /* low 2 bits */ 481#define IOACCEL2_NO_DATAPRESENT 0x000 482#define IOACCEL2_RESPONSE_DATAPRESENT 0x001 483#define IOACCEL2_SENSE_DATA_PRESENT 0x002 484#define IOACCEL2_RESERVED 0x003 485 u8 sense_data_len; /* sense/response data length */ 486 u8 resid_cnt[4]; /* residual count */ 487 u8 sense_data_buff[32]; /* sense/response data buffer */ 488}; 489 490#define IOACCEL2_64_PAD 76 491#define IOACCEL2_32_PAD 76 492#define IOACCEL2_PAD (IS_32_BIT * IOACCEL2_32_PAD + \ 493 IS_64_BIT * IOACCEL2_64_PAD) 494/* 495 * Structure for I/O accelerator (mode 2 or m2) commands. 496 * Note that this structure must be 128-byte aligned in size. 497 */ 498struct io_accel2_cmd { 499 u8 IU_type; /* IU Type */ 500 u8 direction; /* Transfer direction, 2 bits */ 501 u8 reply_queue; /* Reply Queue ID */ 502 u8 reserved1; /* Reserved */ 503 u32 scsi_nexus; /* Device Handle */ 504 struct vals32 Tag; /* cciss tag */ 505 u8 cdb[16]; /* SCSI Command Descriptor Block */ 506 u8 cciss_lun[8]; /* 8 byte SCSI address */ 507 u32 data_len; /* Total bytes to transfer */ 508 u8 cmd_priority_task_attr; /* priority and task attrs */ 509#define IOACCEL2_PRIORITY_MASK 0x78 510#define IOACCEL2_ATTR_MASK 0x07 511 u8 sg_count; /* Number of sg elements */ 512 u8 reserved3[2]; /* Reserved */ 513 u64 err_ptr; /* Error Pointer */ 514 u32 err_len; /* Error Length*/ 515 u8 reserved4[4]; /* Reserved */ 516 struct ioaccel2_sg_element sg[IOACCEL2_MAXSGENTRIES]; 517 struct io_accel2_scsi_response error_data; 518 u8 pad[IOACCEL2_PAD]; 519}; 520 521/* 522 * defines for Mode 2 command struct 523 * FIXME: this can't be all I need mfm 524 */ 525#define IOACCEL2_IU_TYPE 0x40 526#define IU_TYPE_TMF 0x41 527#define IOACCEL2_DIR_NO_DATA 0x00 528#define IOACCEL2_DIR_DATA_IN 0x01 529#define IOACCEL2_DIR_DATA_OUT 0x02 530/* 531 * SCSI Task Management Request format for Accelerator Mode 2 532 */ 533struct hpsa_tmf_struct { 534 u8 iu_type; /* Information Unit Type */ 535 u8 reply_queue; /* Reply Queue ID */ 536 u8 tmf; /* Task Management Function */ 537 u8 reserved1; /* byte 3 Reserved */ 538 u32 it_nexus; /* SCSI I-T Nexus */ 539 u8 lun_id[8]; /* LUN ID for TMF request */ 540 struct vals32 Tag; /* cciss tag associated w/ request */ 541 struct vals32 abort_tag;/* cciss tag of SCSI cmd or task to abort */ 542 u64 error_ptr; /* Error Pointer */ 543 u32 error_len; /* Error Length */ 544}; 545 |
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447/* Configuration Table Structure */ 448struct HostWrite { 449 u32 TransportRequest; 450 u32 Reserved; 451 u32 CoalIntDelay; 452 u32 CoalIntCount; 453}; 454 --- 69 unchanged lines hidden --- | 546/* Configuration Table Structure */ 547struct HostWrite { 548 u32 TransportRequest; 549 u32 Reserved; 550 u32 CoalIntDelay; 551 u32 CoalIntCount; 552}; 553 --- 69 unchanged lines hidden --- |