bfa.h (a714134a857d3984250ee52fda7850b61bf8a94e) | bfa.h (3fd459804ff8e002db2671900debd0fc6dc6c443) |
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1/* 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 3 * All rights reserved 4 * www.brocade.com 5 * 6 * Linux driver for Brocade Fibre Channel Host Bus Adapter. 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 40 unchanged lines hidden (view full) --- 49 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) == \ 50 bfa_reqq_ci(__bfa, __reqq)) 51 52#define bfa_reqq_next(__bfa, __reqq) \ 53 (bfa_reqq_full(__bfa, __reqq) ? NULL : \ 54 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \ 55 + bfa_reqq_pi((__bfa), (__reqq))))) 56 | 1/* 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 3 * All rights reserved 4 * www.brocade.com 5 * 6 * Linux driver for Brocade Fibre Channel Host Bus Adapter. 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 40 unchanged lines hidden (view full) --- 49 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) == \ 50 bfa_reqq_ci(__bfa, __reqq)) 51 52#define bfa_reqq_next(__bfa, __reqq) \ 53 (bfa_reqq_full(__bfa, __reqq) ? NULL : \ 54 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \ 55 + bfa_reqq_pi((__bfa), (__reqq))))) 56 |
57#define bfa_reqq_produce(__bfa, __reqq) do { \ | 57#define bfa_reqq_produce(__bfa, __reqq, __mh) do { \ 58 (__mh).mtag.h2i.qid = (__bfa)->iocfc.hw_qid[__reqq];\ |
58 (__bfa)->iocfc.req_cq_pi[__reqq]++; \ 59 (__bfa)->iocfc.req_cq_pi[__reqq] &= \ 60 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \ 61 writel((__bfa)->iocfc.req_cq_pi[__reqq], \ 62 (__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]); \ 63 mmiowb(); \ 64 } while (0) 65 --- 201 unchanged lines hidden (view full) --- 267}; 268 269struct bfa_iocfc_s { 270 struct bfa_s *bfa; 271 struct bfa_iocfc_cfg_s cfg; 272 int action; 273 u32 req_cq_pi[BFI_IOC_MAX_CQS]; 274 u32 rsp_cq_ci[BFI_IOC_MAX_CQS]; | 59 (__bfa)->iocfc.req_cq_pi[__reqq]++; \ 60 (__bfa)->iocfc.req_cq_pi[__reqq] &= \ 61 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \ 62 writel((__bfa)->iocfc.req_cq_pi[__reqq], \ 63 (__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]); \ 64 mmiowb(); \ 65 } while (0) 66 --- 201 unchanged lines hidden (view full) --- 268}; 269 270struct bfa_iocfc_s { 271 struct bfa_s *bfa; 272 struct bfa_iocfc_cfg_s cfg; 273 int action; 274 u32 req_cq_pi[BFI_IOC_MAX_CQS]; 275 u32 rsp_cq_ci[BFI_IOC_MAX_CQS]; |
276 u8 hw_qid[BFI_IOC_MAX_CQS]; |
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275 struct bfa_cb_qe_s init_hcb_qe; 276 struct bfa_cb_qe_s stop_hcb_qe; 277 struct bfa_cb_qe_s dis_hcb_qe; 278 struct bfa_cb_qe_s stats_hcb_qe; 279 bfa_boolean_t cfgdone; 280 281 struct bfa_dma_s cfg_info; 282 struct bfi_iocfc_cfg_s *cfginfo; --- 6 unchanged lines hidden (view full) --- 289 struct bfa_iocfc_regs_s bfa_regs; /* BFA device registers */ 290 struct bfa_hwif_s hwif; 291 bfa_cb_iocfc_t updateq_cbfn; /* bios callback function */ 292 void *updateq_cbarg; /* bios callback arg */ 293 u32 intr_mask; 294 struct bfa_faa_args_s faa_args; 295}; 296 | 277 struct bfa_cb_qe_s init_hcb_qe; 278 struct bfa_cb_qe_s stop_hcb_qe; 279 struct bfa_cb_qe_s dis_hcb_qe; 280 struct bfa_cb_qe_s stats_hcb_qe; 281 bfa_boolean_t cfgdone; 282 283 struct bfa_dma_s cfg_info; 284 struct bfi_iocfc_cfg_s *cfginfo; --- 6 unchanged lines hidden (view full) --- 291 struct bfa_iocfc_regs_s bfa_regs; /* BFA device registers */ 292 struct bfa_hwif_s hwif; 293 bfa_cb_iocfc_t updateq_cbfn; /* bios callback function */ 294 void *updateq_cbarg; /* bios callback arg */ 295 u32 intr_mask; 296 struct bfa_faa_args_s faa_args; 297}; 298 |
297#define bfa_lpuid(__bfa) \ 298 bfa_ioc_portid(&(__bfa)->ioc) | 299#define bfa_fn_lpu(__bfa) \ 300 bfi_fn_lpu(bfa_ioc_pcifn(&(__bfa)->ioc), bfa_ioc_portid(&(__bfa)->ioc)) |
299#define bfa_msix_init(__bfa, __nvecs) \ 300 ((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs)) 301#define bfa_msix_ctrl_install(__bfa) \ 302 ((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa)) 303#define bfa_msix_queue_install(__bfa) \ 304 ((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa)) 305#define bfa_msix_uninstall(__bfa) \ 306 ((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa)) | 301#define bfa_msix_init(__bfa, __nvecs) \ 302 ((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs)) 303#define bfa_msix_ctrl_install(__bfa) \ 304 ((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa)) 305#define bfa_msix_queue_install(__bfa) \ 306 ((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa)) 307#define bfa_msix_uninstall(__bfa) \ 308 ((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa)) |
309#define bfa_isr_rspq_ack(__bfa, __queue) do { \ 310 if ((__bfa)->iocfc.hwif.hw_rspq_ack) \ 311 (__bfa)->iocfc.hwif.hw_rspq_ack(__bfa, __queue); \ 312} while (0) 313#define bfa_isr_reqq_ack(__bfa, __queue) do { \ 314 if ((__bfa)->iocfc.hwif.hw_reqq_ack) \ 315 (__bfa)->iocfc.hwif.hw_reqq_ack(__bfa, __queue); \ 316} while (0) |
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307#define bfa_isr_mode_set(__bfa, __msix) do { \ 308 if ((__bfa)->iocfc.hwif.hw_isr_mode_set) \ 309 (__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix); \ 310} while (0) | 317#define bfa_isr_mode_set(__bfa, __msix) do { \ 318 if ((__bfa)->iocfc.hwif.hw_isr_mode_set) \ 319 (__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix); \ 320} while (0) |
311 | |
312#define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec) \ 313 ((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap, \ 314 __nvecs, __maxvec)) 315#define bfa_msix_get_rme_range(__bfa, __start, __end) \ 316 ((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end)) 317#define bfa_msix(__bfa, __vec) \ 318 ((__bfa)->msix.handler[__vec](__bfa, __vec)) 319 --- 15 unchanged lines hidden (view full) --- 335void bfa_iocfc_reset_queues(struct bfa_s *bfa); 336 337void bfa_msix_all(struct bfa_s *bfa, int vec); 338void bfa_msix_reqq(struct bfa_s *bfa, int vec); 339void bfa_msix_rspq(struct bfa_s *bfa, int vec); 340void bfa_msix_lpu_err(struct bfa_s *bfa, int vec); 341 342void bfa_hwcb_reginit(struct bfa_s *bfa); | 321#define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec) \ 322 ((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap, \ 323 __nvecs, __maxvec)) 324#define bfa_msix_get_rme_range(__bfa, __start, __end) \ 325 ((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end)) 326#define bfa_msix(__bfa, __vec) \ 327 ((__bfa)->msix.handler[__vec](__bfa, __vec)) 328 --- 15 unchanged lines hidden (view full) --- 344void bfa_iocfc_reset_queues(struct bfa_s *bfa); 345 346void bfa_msix_all(struct bfa_s *bfa, int vec); 347void bfa_msix_reqq(struct bfa_s *bfa, int vec); 348void bfa_msix_rspq(struct bfa_s *bfa, int vec); 349void bfa_msix_lpu_err(struct bfa_s *bfa, int vec); 350 351void bfa_hwcb_reginit(struct bfa_s *bfa); |
343void bfa_hwcb_reqq_ack(struct bfa_s *bfa, int rspq); | |
344void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq); 345void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs); 346void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa); 347void bfa_hwcb_msix_queue_install(struct bfa_s *bfa); 348void bfa_hwcb_msix_uninstall(struct bfa_s *bfa); 349void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix); 350void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs, 351 u32 *maxvec); --- 90 unchanged lines hidden --- | 352void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq); 353void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs); 354void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa); 355void bfa_hwcb_msix_queue_install(struct bfa_s *bfa); 356void bfa_hwcb_msix_uninstall(struct bfa_s *bfa); 357void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix); 358void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs, 359 u32 *maxvec); --- 90 unchanged lines hidden --- |