cio.c (762f99f4f3cb41a775b5157dd761217beba65873) cio.c (5c2e5a0cf5b12c156b0cb07af43b51627c086480)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * S/390 common I/O routines -- low level i/o calls
4 *
5 * Copyright IBM Corp. 1999, 2008
6 * Author(s): Ingo Adlung (adlung@de.ibm.com)
7 * Cornelia Huck (cornelia.huck@de.ibm.com)
8 * Arnd Bergmann (arndb@de.ibm.com)

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129 union orb *orb = &priv->orb;
130 int ccode;
131
132 CIO_TRACE_EVENT(5, "stIO");
133 CIO_TRACE_EVENT(5, dev_name(&sch->dev));
134
135 memset(orb, 0, sizeof(union orb));
136 /* sch is always under 2G. */
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * S/390 common I/O routines -- low level i/o calls
4 *
5 * Copyright IBM Corp. 1999, 2008
6 * Author(s): Ingo Adlung (adlung@de.ibm.com)
7 * Cornelia Huck (cornelia.huck@de.ibm.com)
8 * Arnd Bergmann (arndb@de.ibm.com)

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129 union orb *orb = &priv->orb;
130 int ccode;
131
132 CIO_TRACE_EVENT(5, "stIO");
133 CIO_TRACE_EVENT(5, dev_name(&sch->dev));
134
135 memset(orb, 0, sizeof(union orb));
136 /* sch is always under 2G. */
137 orb->cmd.intparm = (u32)(addr_t)sch;
137 orb->cmd.intparm = (u32)virt_to_phys(sch);
138 orb->cmd.fmt = 1;
139
140 orb->cmd.pfch = priv->options.prefetch == 0;
141 orb->cmd.spnd = priv->options.suspend;
142 orb->cmd.ssic = priv->options.suspend && priv->options.inter;
143 orb->cmd.lpm = (lpm != 0) ? lpm : sch->lpm;
144 /*
145 * for 64 bit we always support 64 bit IDAWs with 4k page size only
146 */
147 orb->cmd.c64 = 1;
148 orb->cmd.i2k = 0;
149 orb->cmd.key = key >> 4;
150 /* issue "Start Subchannel" */
138 orb->cmd.fmt = 1;
139
140 orb->cmd.pfch = priv->options.prefetch == 0;
141 orb->cmd.spnd = priv->options.suspend;
142 orb->cmd.ssic = priv->options.suspend && priv->options.inter;
143 orb->cmd.lpm = (lpm != 0) ? lpm : sch->lpm;
144 /*
145 * for 64 bit we always support 64 bit IDAWs with 4k page size only
146 */
147 orb->cmd.c64 = 1;
148 orb->cmd.i2k = 0;
149 orb->cmd.key = key >> 4;
150 /* issue "Start Subchannel" */
151 orb->cmd.cpa = (__u32) __pa(cpa);
151 orb->cmd.cpa = (u32)virt_to_phys(cpa);
152 ccode = ssch(sch->schid, orb);
153
154 /* process condition code */
155 CIO_HEX_EVENT(5, &ccode, sizeof(ccode));
156
157 switch (ccode) {
158 case 0:
159 /*

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534 struct tpi_info *tpi_info;
535 struct subchannel *sch;
536 struct irb *irb;
537
538 set_cpu_flag(CIF_NOHZ_DELAY);
539 tpi_info = &get_irq_regs()->tpi_info;
540 trace_s390_cio_interrupt(tpi_info);
541 irb = this_cpu_ptr(&cio_irb);
152 ccode = ssch(sch->schid, orb);
153
154 /* process condition code */
155 CIO_HEX_EVENT(5, &ccode, sizeof(ccode));
156
157 switch (ccode) {
158 case 0:
159 /*

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534 struct tpi_info *tpi_info;
535 struct subchannel *sch;
536 struct irb *irb;
537
538 set_cpu_flag(CIF_NOHZ_DELAY);
539 tpi_info = &get_irq_regs()->tpi_info;
540 trace_s390_cio_interrupt(tpi_info);
541 irb = this_cpu_ptr(&cio_irb);
542 sch = (struct subchannel *)(unsigned long) tpi_info->intparm;
543 if (!sch) {
542 if (!tpi_info->intparm) {
544 /* Clear pending interrupt condition. */
545 inc_irq_stat(IRQIO_CIO);
546 tsch(tpi_info->schid, irb);
547 return IRQ_HANDLED;
548 }
543 /* Clear pending interrupt condition. */
544 inc_irq_stat(IRQIO_CIO);
545 tsch(tpi_info->schid, irb);
546 return IRQ_HANDLED;
547 }
548 sch = phys_to_virt(tpi_info->intparm);
549 spin_lock(sch->lock);
550 /* Store interrupt response block to lowcore. */
551 if (tsch(tpi_info->schid, irb) == 0) {
552 /* Keep subchannel information word up to date. */
553 memcpy (&sch->schib.scsw, &irb->scsw, sizeof (irb->scsw));
554 /* Call interrupt handler if there is one. */
555 if (sch->driver && sch->driver->irq)
556 sch->driver->irq(sch);

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661
662 sch = css_alloc_subchannel(schid, &schib);
663 if (IS_ERR(sch))
664 return sch;
665
666 lockdep_set_class(sch->lock, &console_sch_key);
667 isc_register(CONSOLE_ISC);
668 sch->config.isc = CONSOLE_ISC;
549 spin_lock(sch->lock);
550 /* Store interrupt response block to lowcore. */
551 if (tsch(tpi_info->schid, irb) == 0) {
552 /* Keep subchannel information word up to date. */
553 memcpy (&sch->schib.scsw, &irb->scsw, sizeof (irb->scsw));
554 /* Call interrupt handler if there is one. */
555 if (sch->driver && sch->driver->irq)
556 sch->driver->irq(sch);

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661
662 sch = css_alloc_subchannel(schid, &schib);
663 if (IS_ERR(sch))
664 return sch;
665
666 lockdep_set_class(sch->lock, &console_sch_key);
667 isc_register(CONSOLE_ISC);
668 sch->config.isc = CONSOLE_ISC;
669 sch->config.intparm = (u32)(addr_t)sch;
669 sch->config.intparm = (u32)virt_to_phys(sch);
670 ret = cio_commit_config(sch);
671 if (ret) {
672 isc_unregister(CONSOLE_ISC);
673 put_device(&sch->dev);
674 return ERR_PTR(ret);
675 }
676 console_sch = sch;
677 return sch;

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708 * otherwise.
709 */
710int cio_tm_start_key(struct subchannel *sch, struct tcw *tcw, u8 lpm, u8 key)
711{
712 int cc;
713 union orb *orb = &to_io_private(sch)->orb;
714
715 memset(orb, 0, sizeof(union orb));
670 ret = cio_commit_config(sch);
671 if (ret) {
672 isc_unregister(CONSOLE_ISC);
673 put_device(&sch->dev);
674 return ERR_PTR(ret);
675 }
676 console_sch = sch;
677 return sch;

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708 * otherwise.
709 */
710int cio_tm_start_key(struct subchannel *sch, struct tcw *tcw, u8 lpm, u8 key)
711{
712 int cc;
713 union orb *orb = &to_io_private(sch)->orb;
714
715 memset(orb, 0, sizeof(union orb));
716 orb->tm.intparm = (u32) (addr_t) sch;
716 orb->tm.intparm = (u32)virt_to_phys(sch);
717 orb->tm.key = key >> 4;
718 orb->tm.b = 1;
719 orb->tm.lpm = lpm ? lpm : sch->lpm;
717 orb->tm.key = key >> 4;
718 orb->tm.b = 1;
719 orb->tm.lpm = lpm ? lpm : sch->lpm;
720 orb->tm.tcw = (u32) (addr_t) tcw;
720 orb->tm.tcw = (u32)virt_to_phys(tcw);
721 cc = ssch(sch->schid, orb);
722 switch (cc) {
723 case 0:
724 return 0;
725 case 1:
726 case 2:
727 return -EBUSY;
728 default:

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721 cc = ssch(sch->schid, orb);
722 switch (cc) {
723 case 0:
724 return 0;
725 case 1:
726 case 2:
727 return -EBUSY;
728 default:

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