pinctrl.c (a3ee0a246df1755af04d79cd6cd53939aeb6a0db) pinctrl.c (7b1425f08f5620bde28aced29820004bc8c28962)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SuperH Pin Function Controller pinmux support.
4 *
5 * Copyright (C) 2012 Paul Mundt
6 */
7
8#define DRV_NAME "sh-pfc"

--- 421 unchanged lines hidden (view full) ---

430 spin_lock_irqsave(&pfc->lock, flags);
431 cfg->gpio_enabled = false;
432 /* If mux is already set, this configures it here */
433 if (cfg->mux_mark)
434 sh_pfc_config_mux(pfc, cfg->mux_mark, PINMUX_TYPE_FUNCTION);
435 spin_unlock_irqrestore(&pfc->lock, flags);
436}
437
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SuperH Pin Function Controller pinmux support.
4 *
5 * Copyright (C) 2012 Paul Mundt
6 */
7
8#define DRV_NAME "sh-pfc"

--- 421 unchanged lines hidden (view full) ---

430 spin_lock_irqsave(&pfc->lock, flags);
431 cfg->gpio_enabled = false;
432 /* If mux is already set, this configures it here */
433 if (cfg->mux_mark)
434 sh_pfc_config_mux(pfc, cfg->mux_mark, PINMUX_TYPE_FUNCTION);
435 spin_unlock_irqrestore(&pfc->lock, flags);
436}
437
438#ifdef CONFIG_PINCTRL_SH_PFC_GPIO
438static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
439 struct pinctrl_gpio_range *range,
440 unsigned offset, bool input)
441{
442 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
443 struct sh_pfc *pfc = pmx->pfc;
444 int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
445 int idx = sh_pfc_get_pin_index(pfc, offset);

--- 11 unchanged lines hidden (view full) ---

457 return -EINVAL;
458 }
459
460 spin_lock_irqsave(&pfc->lock, flags);
461 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
462 spin_unlock_irqrestore(&pfc->lock, flags);
463 return ret;
464}
439static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
440 struct pinctrl_gpio_range *range,
441 unsigned offset, bool input)
442{
443 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
444 struct sh_pfc *pfc = pmx->pfc;
445 int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
446 int idx = sh_pfc_get_pin_index(pfc, offset);

--- 11 unchanged lines hidden (view full) ---

458 return -EINVAL;
459 }
460
461 spin_lock_irqsave(&pfc->lock, flags);
462 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
463 spin_unlock_irqrestore(&pfc->lock, flags);
464 return ret;
465}
466#else
467#define sh_pfc_gpio_set_direction NULL
468#endif
465
466static const struct pinmux_ops sh_pfc_pinmux_ops = {
467 .get_functions_count = sh_pfc_get_functions_count,
468 .get_function_name = sh_pfc_get_function_name,
469 .get_function_groups = sh_pfc_get_function_groups,
470 .set_mux = sh_pfc_func_set_mux,
471 .gpio_request_enable = sh_pfc_gpio_request_enable,
472 .gpio_disable_free = sh_pfc_gpio_disable_free,

--- 396 unchanged lines hidden --- 		469
470static const struct pinmux_ops sh_pfc_pinmux_ops = {
471 .get_functions_count = sh_pfc_get_functions_count,
472 .get_function_name = sh_pfc_get_function_name,
473 .get_function_groups = sh_pfc_get_function_groups,
474 .set_mux = sh_pfc_func_set_mux,
475 .gpio_request_enable = sh_pfc_gpio_request_enable,
476 .gpio_disable_free = sh_pfc_gpio_disable_free,

--- 396 unchanged lines hidden ---