pinctrl-intel.c (8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17) pinctrl-intel.c (e986f0e602f19ecb7880b04dd1db415ed9bca3f6)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel pinctrl/GPIO core driver.
4 *
5 * Copyright (C) 2015, Intel Corporation
6 * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
7 * Mika Westerberg <mika.westerberg@linux.intel.com>
8 */

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1211 for (i = 0; i < pctrl->ncommunities; i++) {
1212 community = &pctrl->communities[i];
1213 ret += intel_gpio_community_irq_handler(pctrl, community);
1214 }
1215
1216 return IRQ_RETVAL(ret);
1217}
1218
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Intel pinctrl/GPIO core driver.
4 *
5 * Copyright (C) 2015, Intel Corporation
6 * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
7 * Mika Westerberg <mika.westerberg@linux.intel.com>
8 */

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1211 for (i = 0; i < pctrl->ncommunities; i++) {
1212 community = &pctrl->communities[i];
1213 ret += intel_gpio_community_irq_handler(pctrl, community);
1214 }
1215
1216 return IRQ_RETVAL(ret);
1217}
1218
1219static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
1220{
1221 int i;
1222
1223 for (i = 0; i < pctrl->ncommunities; i++) {
1224 const struct intel_community *community;
1225 void __iomem *base;
1226 unsigned int gpp;
1227
1228 community = &pctrl->communities[i];
1229 base = community->regs;
1230
1231 for (gpp = 0; gpp < community->ngpps; gpp++) {
1232 /* Mask and clear all interrupts */
1233 writel(0, base + community->ie_offset + gpp * 4);
1234 writel(0xffff, base + community->is_offset + gpp * 4);
1235 }
1236 }
1237}
1238
1239static int intel_gpio_irq_init_hw(struct gpio_chip *gc)
1240{
1241 struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
1242
1243 /*
1244 * Make sure the interrupt lines are in a proper state before
1245 * further configuration.
1246 */
1247 intel_gpio_irq_init(pctrl);
1248
1249 return 0;
1250}
1251
1219static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
1220 const struct intel_community *community)
1221{
1222 int ret = 0, i;
1223
1224 for (i = 0; i < community->ngpps; i++) {
1225 const struct intel_padgroup *gpp = &community->gpps[i];
1226

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1315
1316 girq = &pctrl->chip.irq;
1317 girq->chip = &pctrl->irqchip;
1318 /* This will let us handle the IRQ in the driver */
1319 girq->parent_handler = NULL;
1320 girq->num_parents = 0;
1321 girq->default_type = IRQ_TYPE_NONE;
1322 girq->handler = handle_bad_irq;
1252static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
1253 const struct intel_community *community)
1254{
1255 int ret = 0, i;
1256
1257 for (i = 0; i < community->ngpps; i++) {
1258 const struct intel_padgroup *gpp = &community->gpps[i];
1259

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1348
1349 girq = &pctrl->chip.irq;
1350 girq->chip = &pctrl->irqchip;
1351 /* This will let us handle the IRQ in the driver */
1352 girq->parent_handler = NULL;
1353 girq->num_parents = 0;
1354 girq->default_type = IRQ_TYPE_NONE;
1355 girq->handler = handle_bad_irq;
1356 girq->init_hw = intel_gpio_irq_init_hw;
1323
1324 ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
1325 if (ret) {
1326 dev_err(pctrl->dev, "failed to register gpiochip\n");
1327 return ret;
1328 }
1329
1330 return 0;

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1690 for (gpp = 0; gpp < community->ngpps; gpp++)
1691 communities[i].hostown[gpp] = readl(base + gpp * 4);
1692 }
1693
1694 return 0;
1695}
1696EXPORT_SYMBOL_GPL(intel_pinctrl_suspend_noirq);
1697
1357
1358 ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
1359 if (ret) {
1360 dev_err(pctrl->dev, "failed to register gpiochip\n");
1361 return ret;
1362 }
1363
1364 return 0;

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1724 for (gpp = 0; gpp < community->ngpps; gpp++)
1725 communities[i].hostown[gpp] = readl(base + gpp * 4);
1726 }
1727
1728 return 0;
1729}
1730EXPORT_SYMBOL_GPL(intel_pinctrl_suspend_noirq);
1731
1698static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
1699{
1700 size_t i;
1701
1702 for (i = 0; i < pctrl->ncommunities; i++) {
1703 const struct intel_community *community;
1704 void __iomem *base;
1705 unsigned int gpp;
1706
1707 community = &pctrl->communities[i];
1708 base = community->regs;
1709
1710 for (gpp = 0; gpp < community->ngpps; gpp++) {
1711 /* Mask and clear all interrupts */
1712 writel(0, base + community->ie_offset + gpp * 4);
1713 writel(0xffff, base + community->is_offset + gpp * 4);
1714 }
1715 }
1716}
1717
1718static bool intel_gpio_update_reg(void __iomem *reg, u32 mask, u32 value)
1719{
1720 u32 curr, updated;
1721
1722 curr = readl(reg);
1723
1724 updated = (curr & ~mask) | (value & mask);
1725 if (curr == updated)

--- 103 unchanged lines hidden --- 		1732static bool intel_gpio_update_reg(void __iomem *reg, u32 mask, u32 value)
1733{
1734 u32 curr, updated;
1735
1736 curr = readl(reg);
1737
1738 updated = (curr & ~mask) | (value & mask);
1739 if (curr == updated)

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