pci-mid.c (f5fbf848303c8704d0e1a1e7cabd08fd0a49552f) pci-mid.c (8e522e1d321b12829960c9b26668c92f14c68d7f)
1/*
2 * Intel MID platform PM support
3 *
4 * Copyright (C) 2016, Intel Corporation
5 *
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 46 unchanged lines hidden (view full) ---

55 .choose_state = mid_pci_choose_state,
56 .sleep_wake = mid_pci_sleep_wake,
57 .run_wake = mid_pci_run_wake,
58 .need_resume = mid_pci_need_resume,
59};
60
61#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
62
1/*
2 * Intel MID platform PM support
3 *
4 * Copyright (C) 2016, Intel Corporation
5 *
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 46 unchanged lines hidden (view full) ---

55 .choose_state = mid_pci_choose_state,
56 .sleep_wake = mid_pci_sleep_wake,
57 .run_wake = mid_pci_run_wake,
58 .need_resume = mid_pci_need_resume,
59};
60
61#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
62
63/*
64 * This table should be in sync with the one in
65 * arch/x86/platform/intel-mid/pwr.c.
66 */
63static const struct x86_cpu_id lpss_cpu_ids[] = {
67static const struct x86_cpu_id lpss_cpu_ids[] = {
68 ICPU(INTEL_FAM6_ATOM_PENWELL),
64 ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
65 {}
66};
67
68static int __init mid_pci_init(void)
69{
70 const struct x86_cpu_id *id;
71
72 id = x86_match_cpu(lpss_cpu_ids);
73 if (id)
74 pci_set_platform_pm(&mid_pci_platform_pm);
75 return 0;
76}
77arch_initcall(mid_pci_init);
69 ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
70 {}
71};
72
73static int __init mid_pci_init(void)
74{
75 const struct x86_cpu_id *id;
76
77 id = x86_match_cpu(lpss_cpu_ids);
78 if (id)
79 pci_set_platform_pm(&mid_pci_platform_pm);
80 return 0;
81}
82arch_initcall(mid_pci_init);