| lba_pci.c (c1b054d03f5b31c33eaa0b267c629b118eaf3790) | lba_pci.c (53f01bba49938f115237fe43a261c31ac13ae5c6) |
|---|---|
| 1/* 2** 3** PCI Lower Bus Adapter (LBA) manager 4** 5** (c) Copyright 1999,2000 Grant Grundler 6** (c) Copyright 1999,2000 Hewlett-Packard Company 7** 8** This program is free software; you can redistribute it and/or modify --- 1274 unchanged lines hidden (view full) --- 1283 r->start = PCI_HOST_ADDR(HBA_DATA(lba_dev), r->start); 1284 rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK); 1285 1286 /* 1287 ** Each rope only gets part of the distributed range. 1288 ** Adjust "window" for this rope. 1289 */ 1290 rsize /= ROPES_PER_IOC; | 1/* 2** 3** PCI Lower Bus Adapter (LBA) manager 4** 5** (c) Copyright 1999,2000 Grant Grundler 6** (c) Copyright 1999,2000 Hewlett-Packard Company 7** 8** This program is free software; you can redistribute it and/or modify --- 1274 unchanged lines hidden (view full) --- 1283 r->start = PCI_HOST_ADDR(HBA_DATA(lba_dev), r->start); 1284 rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK); 1285 1286 /* 1287 ** Each rope only gets part of the distributed range. 1288 ** Adjust "window" for this rope. 1289 */ 1290 rsize /= ROPES_PER_IOC; |
| 1291 r->start += (rsize + 1) * LBA_NUM(pa_dev->hpa); | 1291 r->start += (rsize + 1) * LBA_NUM(pa_dev->hpa.start); |
| 1292 r->end = r->start + rsize; 1293 } else { 1294 r->end = r->start = 0; /* Not enabled. */ 1295 } 1296#endif 1297 1298 /* 1299 ** "Directed" ranges are used when the "distributed range" isn't --- 153 unchanged lines hidden (view full) --- 1453lba_driver_probe(struct parisc_device *dev) 1454{ 1455 struct lba_device *lba_dev; 1456 struct pci_bus *lba_bus; 1457 struct pci_ops *cfg_ops; 1458 u32 func_class; 1459 void *tmp_obj; 1460 char *version; | 1292 r->end = r->start + rsize; 1293 } else { 1294 r->end = r->start = 0; /* Not enabled. */ 1295 } 1296#endif 1297 1298 /* 1299 ** "Directed" ranges are used when the "distributed range" isn't --- 153 unchanged lines hidden (view full) --- 1453lba_driver_probe(struct parisc_device *dev) 1454{ 1455 struct lba_device *lba_dev; 1456 struct pci_bus *lba_bus; 1457 struct pci_ops *cfg_ops; 1458 u32 func_class; 1459 void *tmp_obj; 1460 char *version; |
| 1461 void __iomem *addr = ioremap(dev->hpa, 4096); | 1461 void __iomem *addr = ioremap(dev->hpa.start, 4096); |
| 1462 1463 /* Read HW Rev First */ 1464 func_class = READ_REG32(addr + LBA_FCLASS); 1465 1466 if (IS_ELROY(dev)) { 1467 func_class &= 0xf; 1468 switch (func_class) { 1469 case 0: version = "TR1.0"; break; 1470 case 1: version = "TR2.0"; break; 1471 case 2: version = "TR2.1"; break; 1472 case 3: version = "TR2.2"; break; 1473 case 4: version = "TR3.0"; break; 1474 case 5: version = "TR4.0"; break; 1475 default: version = "TR4+"; 1476 } 1477 1478 printk(KERN_INFO "%s version %s (0x%x) found at 0x%lx\n", | 1462 1463 /* Read HW Rev First */ 1464 func_class = READ_REG32(addr + LBA_FCLASS); 1465 1466 if (IS_ELROY(dev)) { 1467 func_class &= 0xf; 1468 switch (func_class) { 1469 case 0: version = "TR1.0"; break; 1470 case 1: version = "TR2.0"; break; 1471 case 2: version = "TR2.1"; break; 1472 case 3: version = "TR2.2"; break; 1473 case 4: version = "TR3.0"; break; 1474 case 5: version = "TR4.0"; break; 1475 default: version = "TR4+"; 1476 } 1477 1478 printk(KERN_INFO "%s version %s (0x%x) found at 0x%lx\n", |
| 1479 MODULE_NAME, version, func_class & 0xf, dev->hpa); | 1479 MODULE_NAME, version, func_class & 0xf, dev->hpa.start); |
| 1480 1481 if (func_class < 2) { 1482 printk(KERN_WARNING "Can't support LBA older than " 1483 "TR2.1 - continuing under adversity.\n"); 1484 } 1485 1486#if 0 1487/* Elroy TR4.0 should work with simple algorithm. --- 10 unchanged lines hidden (view full) --- 1498 } else if (IS_MERCURY(dev) || IS_QUICKSILVER(dev)) { 1499 func_class &= 0xff; 1500 version = kmalloc(6, GFP_KERNEL); 1501 sprintf(version,"TR%d.%d",(func_class >> 4),(func_class & 0xf)); 1502 /* We could use one printk for both Elroy and Mercury, 1503 * but for the mask for func_class. 1504 */ 1505 printk(KERN_INFO "%s version %s (0x%x) found at 0x%lx\n", | 1480 1481 if (func_class < 2) { 1482 printk(KERN_WARNING "Can't support LBA older than " 1483 "TR2.1 - continuing under adversity.\n"); 1484 } 1485 1486#if 0 1487/* Elroy TR4.0 should work with simple algorithm. --- 10 unchanged lines hidden (view full) --- 1498 } else if (IS_MERCURY(dev) || IS_QUICKSILVER(dev)) { 1499 func_class &= 0xff; 1500 version = kmalloc(6, GFP_KERNEL); 1501 sprintf(version,"TR%d.%d",(func_class >> 4),(func_class & 0xf)); 1502 /* We could use one printk for both Elroy and Mercury, 1503 * but for the mask for func_class. 1504 */ 1505 printk(KERN_INFO "%s version %s (0x%x) found at 0x%lx\n", |
| 1506 MODULE_NAME, version, func_class & 0xff, dev->hpa); | 1506 MODULE_NAME, version, func_class & 0xff, dev->hpa.start); |
| 1507 cfg_ops = &mercury_cfg_ops; 1508 } else { | 1507 cfg_ops = &mercury_cfg_ops; 1508 } else { |
| 1509 printk(KERN_ERR "Unknown LBA found at 0x%lx\n", dev->hpa); | 1509 printk(KERN_ERR "Unknown LBA found at 0x%lx\n", dev->hpa.start); |
| 1510 return -ENODEV; 1511 } 1512 1513 /* 1514 ** Tell I/O SAPIC driver we have a IRQ handler/region. 1515 */ | 1510 return -ENODEV; 1511 } 1512 1513 /* 1514 ** Tell I/O SAPIC driver we have a IRQ handler/region. 1515 */ |
| 1516 tmp_obj = iosapic_register(dev->hpa + LBA_IOSAPIC_BASE); | 1516 tmp_obj = iosapic_register(dev->hpa.start + LBA_IOSAPIC_BASE); |
| 1517 1518 /* NOTE: PCI devices (e.g. 103c:1005 graphics card) which don't 1519 ** have an IRT entry will get NULL back from iosapic code. 1520 */ 1521 1522 lba_dev = kmalloc(sizeof(struct lba_device), GFP_KERNEL); 1523 if (!lba_dev) { 1524 printk(KERN_ERR "lba_init_chip - couldn't alloc lba_device\n"); --- 105 unchanged lines hidden (view full) --- 1630 1631/* 1632** Initialize the IBASE/IMASK registers for LBA (Elroy). 1633** Only called from sba_iommu.c in order to route ranges (MMIO vs DMA). 1634** sba_iommu is responsible for locking (none needed at init time). 1635*/ 1636void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask) 1637{ | 1517 1518 /* NOTE: PCI devices (e.g. 103c:1005 graphics card) which don't 1519 ** have an IRT entry will get NULL back from iosapic code. 1520 */ 1521 1522 lba_dev = kmalloc(sizeof(struct lba_device), GFP_KERNEL); 1523 if (!lba_dev) { 1524 printk(KERN_ERR "lba_init_chip - couldn't alloc lba_device\n"); --- 105 unchanged lines hidden (view full) --- 1630 1631/* 1632** Initialize the IBASE/IMASK registers for LBA (Elroy). 1633** Only called from sba_iommu.c in order to route ranges (MMIO vs DMA). 1634** sba_iommu is responsible for locking (none needed at init time). 1635*/ 1636void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask) 1637{ |
| 1638 void __iomem * base_addr = ioremap(lba->hpa, 4096); | 1638 void __iomem * base_addr = ioremap(lba->hpa.start, 4096); |
| 1639 1640 imask <<= 2; /* adjust for hints - 2 more bits */ 1641 1642 /* Make sure we aren't trying to set bits that aren't writeable. */ 1643 WARN_ON((ibase & 0x001fffff) != 0); 1644 WARN_ON((imask & 0x001fffff) != 0); 1645 1646 DBG("%s() ibase 0x%x imask 0x%x\n", __FUNCTION__, ibase, imask); 1647 WRITE_REG32( imask, base_addr + LBA_IMASK); 1648 WRITE_REG32( ibase, base_addr + LBA_IBASE); 1649 iounmap(base_addr); 1650} 1651 | 1639 1640 imask <<= 2; /* adjust for hints - 2 more bits */ 1641 1642 /* Make sure we aren't trying to set bits that aren't writeable. */ 1643 WARN_ON((ibase & 0x001fffff) != 0); 1644 WARN_ON((imask & 0x001fffff) != 0); 1645 1646 DBG("%s() ibase 0x%x imask 0x%x\n", __FUNCTION__, ibase, imask); 1647 WRITE_REG32( imask, base_addr + LBA_IMASK); 1648 WRITE_REG32( ibase, base_addr + LBA_IBASE); 1649 iounmap(base_addr); 1650} 1651 |