admin-cmd.c (793c7cfce02ce88b7bd67d43834c052d16c096e3) admin-cmd.c (72efd25dcf4f6310e9e6fa85620aa443b27c23fe)
1/*
2 * NVMe admin command implementation.
3 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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177 status = nvmet_zero_sgl(req, len, req->data_len - len);
178 ctrl->nr_changed_ns = 0;
179 clear_bit(NVME_AEN_CFG_NS_ATTR, &ctrl->aen_masked);
180 mutex_unlock(&ctrl->lock);
181out:
182 nvmet_req_complete(req, status);
183}
184
1/*
2 * NVMe admin command implementation.
3 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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177 status = nvmet_zero_sgl(req, len, req->data_len - len);
178 ctrl->nr_changed_ns = 0;
179 clear_bit(NVME_AEN_CFG_NS_ATTR, &ctrl->aen_masked);
180 mutex_unlock(&ctrl->lock);
181out:
182 nvmet_req_complete(req, status);
183}
184
185static u32 nvmet_format_ana_group(struct nvmet_req *req, u32 grpid,
186 struct nvme_ana_group_desc *desc)
187{
188 struct nvmet_ctrl *ctrl = req->sq->ctrl;
189 struct nvmet_ns *ns;
190 u32 count = 0;
191
192 if (!(req->cmd->get_log_page.lsp & NVME_ANA_LOG_RGO)) {
193 rcu_read_lock();
194 list_for_each_entry_rcu(ns, &ctrl->subsys->namespaces, dev_link)
195 if (ns->anagrpid == grpid)
196 desc->nsids[count++] = cpu_to_le32(ns->nsid);
197 rcu_read_unlock();
198 }
199
200 desc->grpid = cpu_to_le32(grpid);
201 desc->nnsids = cpu_to_le32(count);
202 desc->chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
203 desc->state = req->port->ana_state[grpid];
204 memset(desc->rsvd17, 0, sizeof(desc->rsvd17));
205 return sizeof(struct nvme_ana_group_desc) + count * sizeof(__le32);
206}
207
208static void nvmet_execute_get_log_page_ana(struct nvmet_req *req)
209{
210 struct nvme_ana_rsp_hdr hdr = { 0, };
211 struct nvme_ana_group_desc *desc;
212 size_t offset = sizeof(struct nvme_ana_rsp_hdr); /* start beyond hdr */
213 size_t len;
214 u32 grpid;
215 u16 ngrps = 0;
216 u16 status;
217
218 status = NVME_SC_INTERNAL;
219 desc = kmalloc(sizeof(struct nvme_ana_group_desc) +
220 NVMET_MAX_NAMESPACES * sizeof(__le32), GFP_KERNEL);
221 if (!desc)
222 goto out;
223
224 down_read(&nvmet_ana_sem);
225 for (grpid = 1; grpid <= NVMET_MAX_ANAGRPS; grpid++) {
226 if (!nvmet_ana_group_enabled[grpid])
227 continue;
228 len = nvmet_format_ana_group(req, grpid, desc);
229 status = nvmet_copy_to_sgl(req, offset, desc, len);
230 if (status)
231 break;
232 offset += len;
233 ngrps++;
234 }
235
236 hdr.chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
237 hdr.ngrps = cpu_to_le16(ngrps);
238 up_read(&nvmet_ana_sem);
239
240 kfree(desc);
241
242 /* copy the header last once we know the number of groups */
243 status = nvmet_copy_to_sgl(req, 0, &hdr, sizeof(hdr));
244out:
245 nvmet_req_complete(req, status);
246}
247
185static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
186{
187 struct nvmet_ctrl *ctrl = req->sq->ctrl;
188 struct nvme_id_ctrl *id;
189 u16 status = 0;
190 const char model[] = "Linux";
191
192 id = kzalloc(sizeof(*id), GFP_KERNEL);

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208
209 id->rab = 6;
210
211 /*
212 * XXX: figure out how we can assign a IEEE OUI, but until then
213 * the safest is to leave it as zeroes.
214 */
215
248static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
249{
250 struct nvmet_ctrl *ctrl = req->sq->ctrl;
251 struct nvme_id_ctrl *id;
252 u16 status = 0;
253 const char model[] = "Linux";
254
255 id = kzalloc(sizeof(*id), GFP_KERNEL);

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271
272 id->rab = 6;
273
274 /*
275 * XXX: figure out how we can assign a IEEE OUI, but until then
276 * the safest is to leave it as zeroes.
277 */
278
216 /* we support multiple ports and multiples hosts: */
217 id->cmic = (1 << 0) | (1 << 1);
279 /* we support multiple ports, multiples hosts and ANA: */
280 id->cmic = (1 << 0) | (1 << 1) | (1 << 3);
218
219 /* no limit on data transfer sizes for now */
220 id->mdts = 0;
221 id->cntlid = cpu_to_le16(ctrl->cntlid);
222 id->ver = cpu_to_le32(ctrl->subsys->ver);
223
224 /* XXX: figure out what to do about RTD3R/RTD3 */
225 id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL);

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277 /* Max command capsule size is sqe + single page of in-capsule data */
278 id->ioccsz = cpu_to_le32((sizeof(struct nvme_command) +
279 req->port->inline_data_size) / 16);
280 /* Max response capsule size is cqe */
281 id->iorcsz = cpu_to_le32(sizeof(struct nvme_completion) / 16);
282
283 id->msdbd = ctrl->ops->msdbd;
284
281
282 /* no limit on data transfer sizes for now */
283 id->mdts = 0;
284 id->cntlid = cpu_to_le16(ctrl->cntlid);
285 id->ver = cpu_to_le32(ctrl->subsys->ver);
286
287 /* XXX: figure out what to do about RTD3R/RTD3 */
288 id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL);

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340 /* Max command capsule size is sqe + single page of in-capsule data */
341 id->ioccsz = cpu_to_le32((sizeof(struct nvme_command) +
342 req->port->inline_data_size) / 16);
343 /* Max response capsule size is cqe */
344 id->iorcsz = cpu_to_le32(sizeof(struct nvme_completion) / 16);
345
346 id->msdbd = ctrl->ops->msdbd;
347
348 id->anacap = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4);
349 id->anatt = 10; /* random value */
350 id->anagrpmax = cpu_to_le32(NVMET_MAX_ANAGRPS);
351 id->nanagrpid = cpu_to_le32(NVMET_MAX_ANAGRPS);
352
285 /*
286 * Meh, we don't really support any power state. Fake up the same
287 * values that qemu does.
288 */
289 id->psd[0].max_power = cpu_to_le16(0x9c4);
290 id->psd[0].entry_lat = cpu_to_le32(0x10);
291 id->psd[0].exit_lat = cpu_to_le32(0x4);
292

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318 ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->identify.nsid);
319 if (!ns)
320 goto done;
321
322 /*
323 * nuse = ncap = nsze isn't always true, but we have no way to find
324 * that out from the underlying device.
325 */
353 /*
354 * Meh, we don't really support any power state. Fake up the same
355 * values that qemu does.
356 */
357 id->psd[0].max_power = cpu_to_le16(0x9c4);
358 id->psd[0].entry_lat = cpu_to_le32(0x10);
359 id->psd[0].exit_lat = cpu_to_le32(0x4);
360

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386 ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->identify.nsid);
387 if (!ns)
388 goto done;
389
390 /*
391 * nuse = ncap = nsze isn't always true, but we have no way to find
392 * that out from the underlying device.
393 */
326 id->ncap = id->nuse = id->nsze =
327 cpu_to_le64(ns->size >> ns->blksize_shift);
394 id->ncap = id->nsze = cpu_to_le64(ns->size >> ns->blksize_shift);
395 switch (req->port->ana_state[ns->anagrpid]) {
396 case NVME_ANA_INACCESSIBLE:
397 case NVME_ANA_PERSISTENT_LOSS:
398 break;
399 default:
400 id->nuse = id->nsze;
401 break;
402 }
328
329 /*
330 * We just provide a single LBA format that matches what the
331 * underlying device reports.
332 */
333 id->nlbaf = 0;
334 id->flbas = 0;
335
336 /*
337 * Our namespace might always be shared. Not just with other
338 * controllers, but also with any other user of the block device.
339 */
340 id->nmic = (1 << 0);
403
404 /*
405 * We just provide a single LBA format that matches what the
406 * underlying device reports.
407 */
408 id->nlbaf = 0;
409 id->flbas = 0;
410
411 /*
412 * Our namespace might always be shared. Not just with other
413 * controllers, but also with any other user of the block device.
414 */
415 id->nmic = (1 << 0);
416 id->anagrpid = cpu_to_le32(ns->anagrpid);
341
342 memcpy(&id->nguid, &ns->nguid, sizeof(id->nguid));
343
344 id->lbaf[0].ds = ns->blksize_shift;
345
346 nvmet_put_namespace(ns);
347done:
348 status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));

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615 req->execute = nvmet_execute_get_log_page_noop;
616 return 0;
617 case NVME_LOG_CHANGED_NS:
618 req->execute = nvmet_execute_get_log_changed_ns;
619 return 0;
620 case NVME_LOG_CMD_EFFECTS:
621 req->execute = nvmet_execute_get_log_cmd_effects_ns;
622 return 0;
417
418 memcpy(&id->nguid, &ns->nguid, sizeof(id->nguid));
419
420 id->lbaf[0].ds = ns->blksize_shift;
421
422 nvmet_put_namespace(ns);
423done:
424 status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));

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691 req->execute = nvmet_execute_get_log_page_noop;
692 return 0;
693 case NVME_LOG_CHANGED_NS:
694 req->execute = nvmet_execute_get_log_changed_ns;
695 return 0;
696 case NVME_LOG_CMD_EFFECTS:
697 req->execute = nvmet_execute_get_log_cmd_effects_ns;
698 return 0;
699 case NVME_LOG_ANA:
700 req->execute = nvmet_execute_get_log_page_ana;
701 return 0;
623 }
624 break;
625 case nvme_admin_identify:
626 req->data_len = NVME_IDENTIFY_DATA_SIZE;
627 switch (cmd->identify.cns) {
628 case NVME_ID_CNS_NS:
629 req->execute = nvmet_execute_identify_ns;
630 return 0;

--- 37 unchanged lines hidden --- 		702 }
703 break;
704 case nvme_admin_identify:
705 req->data_len = NVME_IDENTIFY_DATA_SIZE;
706 switch (cmd->identify.cns) {
707 case NVME_ID_CNS_NS:
708 req->execute = nvmet_execute_identify_ns;
709 return 0;

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