mt76.h (5d5a99464abb00b51dd3b47e6c11793ef1d66ec2) mt76.h (0987295750574adc59999b8fb9890834574bc4e2)
1/* SPDX-License-Identifier: ISC */
2/*
3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 */
5
6#ifndef __MT76_H
7#define __MT76_H
8

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383 MT_EP_OUT_AC_BE,
384 MT_EP_OUT_AC_BK,
385 MT_EP_OUT_AC_VI,
386 MT_EP_OUT_AC_VO,
387 MT_EP_OUT_HCCA,
388 __MT_EP_OUT_MAX,
389};
390
1/* SPDX-License-Identifier: ISC */
2/*
3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4 */
5
6#ifndef __MT76_H
7#define __MT76_H
8

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383 MT_EP_OUT_AC_BE,
384 MT_EP_OUT_AC_BK,
385 MT_EP_OUT_AC_VI,
386 MT_EP_OUT_AC_VO,
387 MT_EP_OUT_HCCA,
388 __MT_EP_OUT_MAX,
389};
390
391struct mt76_mcu {
392 struct mutex mutex;
393 u32 msg_seq;
394
395 struct sk_buff_head res_q;
396 wait_queue_head_t wait;
397};
398
391#define MT_TX_SG_MAX_SIZE 8
392#define MT_RX_SG_MAX_SIZE 4
393#define MT_NUM_TX_ENTRIES 256
394#define MT_NUM_RX_ENTRIES 128
395#define MCU_RESP_URB_SIZE 1024
396struct mt76_usb {
397 struct mutex usb_ctrl_mtx;
398 __le32 reg_val;

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403 struct workqueue_struct *wq;
404 struct work_struct stat_work;
405
406 u8 out_ep[__MT_EP_OUT_MAX];
407 u8 in_ep[__MT_EP_IN_MAX];
408 bool sg_en;
409
410 struct mt76u_mcu {
399#define MT_TX_SG_MAX_SIZE 8
400#define MT_RX_SG_MAX_SIZE 4
401#define MT_NUM_TX_ENTRIES 256
402#define MT_NUM_RX_ENTRIES 128
403#define MCU_RESP_URB_SIZE 1024
404struct mt76_usb {
405 struct mutex usb_ctrl_mtx;
406 __le32 reg_val;

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411 struct workqueue_struct *wq;
412 struct work_struct stat_work;
413
414 u8 out_ep[__MT_EP_OUT_MAX];
415 u8 in_ep[__MT_EP_IN_MAX];
416 bool sg_en;
417
418 struct mt76u_mcu {
411 struct mutex mutex;
412 u8 *data;
419 u8 *data;
413 u32 msg_seq;
414
415 /* multiple reads */
416 struct mt76_reg_pair *rp;
417 int rp_len;
418 u32 base;
419 bool burst;
420 } mcu;
421};
422
423struct mt76_mmio {
420 /* multiple reads */
421 struct mt76_reg_pair *rp;
422 int rp_len;
423 u32 base;
424 bool burst;
425 } mcu;
426};
427
428struct mt76_mmio {
424 struct mt76e_mcu {
425 struct mutex mutex;
426
427 wait_queue_head_t wait;
428 struct sk_buff_head res_q;
429
430 u32 msg_seq;
431 } mcu;
432 void __iomem *regs;
433 spinlock_t irq_lock;
434 u32 irqmask;
435};
436
437struct mt76_rx_status {
438 union {
439 struct mt76_wcid *wcid;

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501
502 struct mutex mutex;
503
504 const struct mt76_bus_ops *bus;
505 const struct mt76_driver_ops *drv;
506 const struct mt76_mcu_ops *mcu_ops;
507 struct device *dev;
508
429 void __iomem *regs;
430 spinlock_t irq_lock;
431 u32 irqmask;
432};
433
434struct mt76_rx_status {
435 union {
436 struct mt76_wcid *wcid;

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498
499 struct mutex mutex;
500
501 const struct mt76_bus_ops *bus;
502 const struct mt76_driver_ops *drv;
503 const struct mt76_mcu_ops *mcu_ops;
504 struct device *dev;
505
506 struct mt76_mcu mcu;
507
509 struct net_device napi_dev;
510 spinlock_t rx_lock;
511 struct napi_struct napi[__MT_RXQ_MAX];
512 struct sk_buff_head rx_skb[__MT_RXQ_MAX];
513
514 struct list_head txwi_cache;
515 struct mt76_sw_queue q_tx[2 * __MT_TXQ_MAX];
516 struct mt76_queue q_rx[__MT_RXQ_MAX];

--- 404 unchanged lines hidden --- 		508 struct net_device napi_dev;
509 spinlock_t rx_lock;
510 struct napi_struct napi[__MT_RXQ_MAX];
511 struct sk_buff_head rx_skb[__MT_RXQ_MAX];
512
513 struct list_head txwi_cache;
514 struct mt76_sw_queue q_tx[2 * __MT_TXQ_MAX];
515 struct mt76_queue q_rx[__MT_RXQ_MAX];

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