xmit.c (56b4811039174bba9cbd68318d0d8b1585b9eded) xmit.c (350e2dcb4647d144000db1505c94d586fcd57919)
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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42 { 78, 162 }, /* 2: QPSK 3/4 */
43 { 104, 216 }, /* 3: 16-QAM 1/2 */
44 { 156, 324 }, /* 4: 16-QAM 3/4 */
45 { 208, 432 }, /* 5: 64-QAM 2/3 */
46 { 234, 486 }, /* 6: 64-QAM 3/4 */
47 { 260, 540 }, /* 7: 64-QAM 5/6 */
48};
49
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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42 { 78, 162 }, /* 2: QPSK 3/4 */
43 { 104, 216 }, /* 3: 16-QAM 1/2 */
44 { 156, 324 }, /* 4: 16-QAM 3/4 */
45 { 208, 432 }, /* 5: 64-QAM 2/3 */
46 { 234, 486 }, /* 6: 64-QAM 3/4 */
47 { 260, 540 }, /* 7: 64-QAM 5/6 */
48};
49
50#define IS_HT_RATE(_rate) ((_rate) & 0x80)
51
52static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
53 struct ath_atx_tid *tid, struct sk_buff *skb);
54static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
55 int tx_flags, struct ath_txq *txq);
56static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
57 struct ath_txq *txq, struct list_head *bf_q,
58 struct ath_tx_status *ts, int txok);
59static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,

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169 ieee80211_wake_queue(sc->hw, q);
170 txq->stopped = false;
171 }
172}
173
174static struct ath_atx_tid *
175ath_get_skb_tid(struct ath_softc *sc, struct ath_node *an, struct sk_buff *skb)
176{
50static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
51 struct ath_atx_tid *tid, struct sk_buff *skb);
52static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
53 int tx_flags, struct ath_txq *txq);
54static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
55 struct ath_txq *txq, struct list_head *bf_q,
56 struct ath_tx_status *ts, int txok);
57static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,

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167 ieee80211_wake_queue(sc->hw, q);
168 txq->stopped = false;
169 }
170}
171
172static struct ath_atx_tid *
173ath_get_skb_tid(struct ath_softc *sc, struct ath_node *an, struct sk_buff *skb)
174{
177 struct ieee80211_hdr *hdr;
178 u8 tidno = 0;
179
180 hdr = (struct ieee80211_hdr *) skb->data;
181 if (ieee80211_is_data_qos(hdr->frame_control))
182 tidno = ieee80211_get_qos_ctl(hdr)[0];
183
184 tidno &= IEEE80211_QOS_CTL_TID_MASK;
175 u8 tidno = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
185 return ATH_AN_2_TID(an, tidno);
186}
187
188static bool ath_tid_has_buffered(struct ath_atx_tid *tid)
189{
190 return !skb_queue_empty(&tid->buf_q) || !skb_queue_empty(&tid->retry_q);
191}
192

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776
777 /*
778 * Override the default aggregation limit for BTCOEX.
779 */
780 bt_aggr_limit = ath9k_btcoex_aggr_limit(sc, max_4ms_framelen);
781 if (bt_aggr_limit)
782 aggr_limit = bt_aggr_limit;
783
176 return ATH_AN_2_TID(an, tidno);
177}
178
179static bool ath_tid_has_buffered(struct ath_atx_tid *tid)
180{
181 return !skb_queue_empty(&tid->buf_q) || !skb_queue_empty(&tid->retry_q);
182}
183

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767
768 /*
769 * Override the default aggregation limit for BTCOEX.
770 */
771 bt_aggr_limit = ath9k_btcoex_aggr_limit(sc, max_4ms_framelen);
772 if (bt_aggr_limit)
773 aggr_limit = bt_aggr_limit;
774
784 /*
785 * h/w can accept aggregates up to 16 bit lengths (65535).
786 * The IE, however can hold up to 65536, which shows up here
787 * as zero. Ignore 65536 since we are constrained by hw.
788 */
789 if (tid->an->maxampdu)
790 aggr_limit = min(aggr_limit, tid->an->maxampdu);
791
792 return aggr_limit;
793}
794
795/*
796 * Returns the number of delimiters to be added to

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1405
1406 ath_txq_lock(sc, txq);
1407
1408 /* update ampdu factor/density, they may have changed. This may happen
1409 * in HT IBSS when a beacon with HT-info is received after the station
1410 * has already been added.
1411 */
1412 if (sta->ht_cap.ht_supported) {
775 if (tid->an->maxampdu)
776 aggr_limit = min(aggr_limit, tid->an->maxampdu);
777
778 return aggr_limit;
779}
780
781/*
782 * Returns the number of delimiters to be added to

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1391
1392 ath_txq_lock(sc, txq);
1393
1394 /* update ampdu factor/density, they may have changed. This may happen
1395 * in HT IBSS when a beacon with HT-info is received after the station
1396 * has already been added.
1397 */
1398 if (sta->ht_cap.ht_supported) {
1413 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
1414 sta->ht_cap.ampdu_factor);
1399 an->maxampdu = (1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
1400 sta->ht_cap.ampdu_factor)) - 1;
1415 density = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
1416 an->mpdudensity = density;
1417 }
1418
1419 /* force sequence number allocation for pending frames */
1420 ath_tx_tid_change_state(sc, txtid);
1421
1422 txtid->active = true;

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1785
1786 ath9k_hw_abort_tx_dma(ah);
1787
1788 /* Check if any queue remains active */
1789 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1790 if (!ATH_TXQ_SETUP(sc, i))
1791 continue;
1792
1401 density = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
1402 an->mpdudensity = density;
1403 }
1404
1405 /* force sequence number allocation for pending frames */
1406 ath_tx_tid_change_state(sc, txtid);
1407
1408 txtid->active = true;

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1771
1772 ath9k_hw_abort_tx_dma(ah);
1773
1774 /* Check if any queue remains active */
1775 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1776 if (!ATH_TXQ_SETUP(sc, i))
1777 continue;
1778
1779 if (!sc->tx.txq[i].axq_depth)
1780 continue;
1781
1793 if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
1794 npend |= BIT(i);
1795 }
1796
1797 if (npend)
1798 ath_err(common, "Failed to stop TX DMA, queues=0x%03x!\n", npend);
1799
1800 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {

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2748
2749 ath_tid_drain(sc, txq, tid);
2750 tid->active = false;
2751
2752 ath_txq_unlock(sc, txq);
2753 }
2754}
2755
1782 if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
1783 npend |= BIT(i);
1784 }
1785
1786 if (npend)
1787 ath_err(common, "Failed to stop TX DMA, queues=0x%03x!\n", npend);
1788
1789 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {

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2737
2738 ath_tid_drain(sc, txq, tid);
2739 tid->active = false;
2740
2741 ath_txq_unlock(sc, txq);
2742 }
2743}
2744
2745#ifdef CONFIG_ATH9K_TX99
2746
2756int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
2757 struct ath_tx_control *txctl)
2758{
2759 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2760 struct ath_frame_info *fi = get_frame_info(skb);
2761 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2762 struct ath_buf *bf;
2763 int padpos, padsize;

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2790
2791 ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, bf->bf_daddr);
2792 ath9k_hw_tx99_start(sc->sc_ah, txctl->txq->axq_qnum);
2793
2794 ath_tx_send_normal(sc, txctl->txq, NULL, skb);
2795
2796 return 0;
2797}
2747int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
2748 struct ath_tx_control *txctl)
2749{
2750 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2751 struct ath_frame_info *fi = get_frame_info(skb);
2752 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2753 struct ath_buf *bf;
2754 int padpos, padsize;

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2781
2782 ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, bf->bf_daddr);
2783 ath9k_hw_tx99_start(sc->sc_ah, txctl->txq->axq_qnum);
2784
2785 ath_tx_send_normal(sc, txctl->txq, NULL, skb);
2786
2787 return 0;
2788}
2789
2790#endif /* CONFIG_ATH9K_TX99 */