reg.h (89916cc90a78fffbc4c3d7cb1f6540fb2e551804) reg.h (a01ab81b09c55025365c1de1345b941a18e05529)
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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980 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9531_11))
981#define AR_SREV_9531_20(_ah) \
982 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9531) && \
983 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9531_20))
984
985#define AR_SREV_9561(_ah) \
986 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9561))
987
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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980 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9531_11))
981#define AR_SREV_9531_20(_ah) \
982 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9531) && \
983 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9531_20))
984
985#define AR_SREV_9561(_ah) \
986 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9561))
987
988#define AR_SREV_SOC(_ah) \
989 (AR_SREV_9340(_ah) || AR_SREV_9531(_ah) || AR_SREV_9550(ah) || \
990 AR_SREV_9561(ah))
991
988/* NOTE: When adding chips newer than Peacock, add chip check here */
989#define AR_SREV_9580_10_OR_LATER(_ah) \
990 (AR_SREV_9580(_ah))
991
992enum ath_usb_dev {
993 AR9280_USB = 1, /* AR7010 + AR9280, UB94 */
994 AR9287_USB = 2, /* AR7010 + AR9287, UB95 */
995 STORAGE_DEVICE = 3,

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1099
1100#define AR_PCIE_SERDES 0x4040
1101#define AR_PCIE_SERDES2 0x4044
1102#define AR_PCIE_PM_CTRL (AR_SREV_9340(ah) ? 0x4004 : 0x4014)
1103#define AR_PCIE_PM_CTRL_ENA 0x00080000
1104
1105#define AR_PCIE_PHY_REG3 0x18c08
1106
992/* NOTE: When adding chips newer than Peacock, add chip check here */
993#define AR_SREV_9580_10_OR_LATER(_ah) \
994 (AR_SREV_9580(_ah))
995
996enum ath_usb_dev {
997 AR9280_USB = 1, /* AR7010 + AR9280, UB94 */
998 AR9287_USB = 2, /* AR7010 + AR9287, UB95 */
999 STORAGE_DEVICE = 3,

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1103
1104#define AR_PCIE_SERDES 0x4040
1105#define AR_PCIE_SERDES2 0x4044
1106#define AR_PCIE_PM_CTRL (AR_SREV_9340(ah) ? 0x4004 : 0x4014)
1107#define AR_PCIE_PM_CTRL_ENA 0x00080000
1108
1109#define AR_PCIE_PHY_REG3 0x18c08
1110
1111/* Define correct GPIO numbers and MASK bits to indicate the WMAC
1112 * GPIO resource.
1113 * Allow SOC chips(AR9340, AR9531, AR9550, AR9561) to access all GPIOs
1114 * which rely on gpiolib framework. But restrict SOC AR9330 only to
1115 * access WMAC GPIO which has the same design with the old chips.
1116 */
1107#define AR_NUM_GPIO 14
1117#define AR_NUM_GPIO 14
1108#define AR928X_NUM_GPIO 10
1118#define AR9280_NUM_GPIO 10
1109#define AR9285_NUM_GPIO 12
1119#define AR9285_NUM_GPIO 12
1110#define AR9287_NUM_GPIO 11
1120#define AR9287_NUM_GPIO 10
1111#define AR9271_NUM_GPIO 16
1121#define AR9271_NUM_GPIO 16
1112#define AR9300_NUM_GPIO 17
1122#define AR9300_NUM_GPIO 16
1123#define AR9330_NUM_GPIO 16
1124#define AR9340_NUM_GPIO 23
1125#define AR9462_NUM_GPIO 10
1126#define AR9485_NUM_GPIO 12
1127#define AR9531_NUM_GPIO 18
1128#define AR9550_NUM_GPIO 24
1129#define AR9561_NUM_GPIO 23
1130#define AR9565_NUM_GPIO 12
1131#define AR9580_NUM_GPIO 16
1113#define AR7010_NUM_GPIO 16
1114
1132#define AR7010_NUM_GPIO 16
1133
1134#define AR_GPIO_MASK 0x00003FFF
1135#define AR9271_GPIO_MASK 0x0000FFFF
1136#define AR9280_GPIO_MASK 0x000003FF
1137#define AR9285_GPIO_MASK 0x00000FFF
1138#define AR9287_GPIO_MASK 0x000003FF
1139#define AR9300_GPIO_MASK 0x0000F4FF
1140#define AR9330_GPIO_MASK 0x0000F4FF
1141#define AR9340_GPIO_MASK 0x0000000F
1142#define AR9462_GPIO_MASK 0x000003FF
1143#define AR9485_GPIO_MASK 0x00000FFF
1144#define AR9531_GPIO_MASK 0x0000000F
1145#define AR9550_GPIO_MASK 0x0000000F
1146#define AR9561_GPIO_MASK 0x0000000F
1147#define AR9565_GPIO_MASK 0x00000FFF
1148#define AR9580_GPIO_MASK 0x0000F4FF
1149#define AR7010_GPIO_MASK 0x0000FFFF
1150
1115#define AR_GPIO_IN_OUT (AR_SREV_9340(ah) ? 0x4028 : 0x4048)
1116#define AR_GPIO_IN_VAL 0x0FFFC000
1117#define AR_GPIO_IN_VAL_S 14
1118#define AR928X_GPIO_IN_VAL 0x000FFC00
1119#define AR928X_GPIO_IN_VAL_S 10
1120#define AR9285_GPIO_IN_VAL 0x00FFF000
1121#define AR9285_GPIO_IN_VAL_S 12
1122#define AR9287_GPIO_IN_VAL 0x003FF800

--- 931 unchanged lines hidden --- 		1151#define AR_GPIO_IN_OUT (AR_SREV_9340(ah) ? 0x4028 : 0x4048)
1152#define AR_GPIO_IN_VAL 0x0FFFC000
1153#define AR_GPIO_IN_VAL_S 14
1154#define AR928X_GPIO_IN_VAL 0x000FFC00
1155#define AR928X_GPIO_IN_VAL_S 10
1156#define AR9285_GPIO_IN_VAL 0x00FFF000
1157#define AR9285_GPIO_IN_VAL_S 12
1158#define AR9287_GPIO_IN_VAL 0x003FF800

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