eeprom.h (b5aec950eeb433d4850c1e5fcf14b666048e647d) eeprom.h (7f63845f2a5f54c64968a4221561c619468b8a54)
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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399 u8 txFrameToXpaOn;
400 u8 thresh62;
401 u8 noiseFloorThreshCh[AR5416_EEP4K_MAX_CHAINS];
402 u8 xpdGain;
403 u8 xpd;
404 u8 iqCalICh[AR5416_EEP4K_MAX_CHAINS];
405 u8 iqCalQCh[AR5416_EEP4K_MAX_CHAINS];
406 u8 pdGainOverlap;
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

--- 390 unchanged lines hidden (view full) ---

399 u8 txFrameToXpaOn;
400 u8 thresh62;
401 u8 noiseFloorThreshCh[AR5416_EEP4K_MAX_CHAINS];
402 u8 xpdGain;
403 u8 xpd;
404 u8 iqCalICh[AR5416_EEP4K_MAX_CHAINS];
405 u8 iqCalQCh[AR5416_EEP4K_MAX_CHAINS];
406 u8 pdGainOverlap;
407 u8 ob_01;
408 u8 db1_01;
407#ifdef __BIG_ENDIAN_BITFIELD
408 u8 ob_1:4, ob_0:4;
409 u8 db1_1:4, db1_0:4;
410#else
411 u8 ob_0:4, ob_1:4;
412 u8 db1_0:4, db1_1:4;
413#endif
409 u8 xpaBiasLvl;
410 u8 txFrameToDataStart;
411 u8 txFrameToPaOn;
412 u8 ht40PowerIncForPdadc;
413 u8 bswAtten[AR5416_EEP4K_MAX_CHAINS];
414 u8 bswMargin[AR5416_EEP4K_MAX_CHAINS];
415 u8 swSettleHt40;
416 u8 xatten2Db[AR5416_EEP4K_MAX_CHAINS];
417 u8 xatten2Margin[AR5416_EEP4K_MAX_CHAINS];
414 u8 xpaBiasLvl;
415 u8 txFrameToDataStart;
416 u8 txFrameToPaOn;
417 u8 ht40PowerIncForPdadc;
418 u8 bswAtten[AR5416_EEP4K_MAX_CHAINS];
419 u8 bswMargin[AR5416_EEP4K_MAX_CHAINS];
420 u8 swSettleHt40;
421 u8 xatten2Db[AR5416_EEP4K_MAX_CHAINS];
422 u8 xatten2Margin[AR5416_EEP4K_MAX_CHAINS];
418 u8 db2_01;
423#ifdef __BIG_ENDIAN_BITFIELD
424 u8 db2_1:4, db2_0:4;
425#else
426 u8 db2_0:4, db2_1:4;
427#endif
419 u8 version;
428 u8 version;
420 u16 ob_234;
421 u16 db1_234;
422 u16 db2_234;
429#ifdef __BIG_ENDIAN_BITFIELD
430 u8 ob_3:4, ob_2:4;
431 u8 antdiv_ctl1:4, ob_4:4;
432 u8 db1_3:4, db1_2:4;
433 u8 antdiv_ctl2:4, db1_4:4;
434 u8 db2_2:4, db2_3:4;
435 u8 reserved:4, db2_4:4;
436#else
437 u8 ob_2:4, ob_3:4;
438 u8 ob_4:4, antdiv_ctl1:4;
439 u8 db1_2:4, db1_3:4;
440 u8 db1_4:4, antdiv_ctl2:4;
441 u8 db2_2:4, db2_3:4;
442 u8 db2_4:4, reserved:4;
443#endif
423 u8 futureModal[4];
424 struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
425} __packed;
426
427struct base_eep_ar9287_header {
428 u16 length;
429 u16 checksum;
430 u16 version;

--- 264 unchanged lines hidden --- 		444 u8 futureModal[4];
445 struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
446} __packed;
447
448struct base_eep_ar9287_header {
449 u16 length;
450 u16 checksum;
451 u16 version;

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