debug.c (f7e014dac29b1abe5c8fa8d721d43928633340ab) debug.c (6bc05a9555543d0f8cc56bf2647819aebe39e938)
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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1318#define ATH_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].c)
1319 struct ath_hw *ah = sc->sc_ah;
1320 struct ath_common *common = ath9k_hw_common(ah);
1321 unsigned long flags;
1322 int i;
1323
1324 ath9k_ps_wakeup(sc);
1325
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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1318#define ATH_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].c)
1319 struct ath_hw *ah = sc->sc_ah;
1320 struct ath_common *common = ath9k_hw_common(ah);
1321 unsigned long flags;
1322 int i;
1323
1324 ath9k_ps_wakeup(sc);
1325
1326 spin_lock_bh(&sc->debug.samp_lock);
1327
1326 spin_lock_irqsave(&common->cc_lock, flags);
1327 ath_hw_cycle_counters_update(common);
1328 spin_lock_irqsave(&common->cc_lock, flags);
1329 ath_hw_cycle_counters_update(common);
1328 spin_unlock_irqrestore(&common->cc_lock, flags);
1329
1330
1330 spin_lock_bh(&sc->debug.samp_lock);
1331
1332 ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles;
1333 ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy;
1334 ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame;
1335 ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame;
1331 ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles;
1332 ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy;
1333 ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame;
1334 ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame;
1335 spin_unlock_irqrestore(&common->cc_lock, flags);
1336
1336 ATH_SAMP_DBG(noise) = ah->noise;
1337
1338 REG_WRITE_D(ah, AR_MACMISC,
1339 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
1340 (AR_MACMISC_MISC_OBS_BUS_1 <<
1341 AR_MACMISC_MISC_OBS_BUS_MSB_S)));
1342
1343 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)

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1385 return -ENOMEM;
1386 }
1387 /* Account the current state too */
1388 ath9k_debug_samp_bb_mac(sc);
1389
1390 spin_lock_bh(&sc->debug.samp_lock);
1391 memcpy(bb_mac_samp, sc->debug.bb_mac_samp,
1392 sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1337 ATH_SAMP_DBG(noise) = ah->noise;
1338
1339 REG_WRITE_D(ah, AR_MACMISC,
1340 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
1341 (AR_MACMISC_MISC_OBS_BUS_1 <<
1342 AR_MACMISC_MISC_OBS_BUS_MSB_S)));
1343
1344 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)

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1386 return -ENOMEM;
1387 }
1388 /* Account the current state too */
1389 ath9k_debug_samp_bb_mac(sc);
1390
1391 spin_lock_bh(&sc->debug.samp_lock);
1392 memcpy(bb_mac_samp, sc->debug.bb_mac_samp,
1393 sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1394 len += snprintf(buf + len, size - len,
1395 "Current Sample Index: %d\n", sc->debug.sampidx);
1393 spin_unlock_bh(&sc->debug.samp_lock);
1394
1395 len += snprintf(buf + len, size - len,
1396 "Raw DMA Debug Dump:\n");
1397 len += snprintf(buf + len, size - len, "Sample |\t");
1398 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1399 len += snprintf(buf + len, size - len, " DMA Reg%d |\t", i);
1400 len += snprintf(buf + len, size - len, "\n");

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1397
1398 len += snprintf(buf + len, size - len,
1399 "Raw DMA Debug Dump:\n");
1400 len += snprintf(buf + len, size - len, "Sample |\t");
1401 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1402 len += snprintf(buf + len, size - len, " DMA Reg%d |\t", i);
1403 len += snprintf(buf + len, size - len, "\n");

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