debug.c (1bddc59c2546a24a92b1e7d4d8fa1e1e38aeedb2) debug.c (56dc63369270b60e59637d153caf2e6b424ca30e)
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

--- 697 unchanged lines hidden (view full) ---

706 goto done;
707
708 for (q = 0; q < WME_NUM_TID; q++) {
709 struct ath_atx_tid *tid = &(an->tid[q]);
710 len += snprintf(buf + len, size - len,
711 " tid: %p %s %s %i %p %p\n",
712 tid, tid->sched ? "sched" : "idle",
713 tid->paused ? "paused" : "running",
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

--- 697 unchanged lines hidden (view full) ---

706 goto done;
707
708 for (q = 0; q < WME_NUM_TID; q++) {
709 struct ath_atx_tid *tid = &(an->tid[q]);
710 len += snprintf(buf + len, size - len,
711 " tid: %p %s %s %i %p %p\n",
712 tid, tid->sched ? "sched" : "idle",
713 tid->paused ? "paused" : "running",
714 list_empty(&tid->buf_q),
714 skb_queue_empty(&tid->buf_q),
715 tid->an, tid->ac);
716 if (len >= size)
717 goto done;
718 }
719
720 for (q = 0; q < WME_NUM_AC; q++) {
721 struct ath_atx_ac *ac = &(an->ac[q]);
722 len += snprintf(buf + len, size - len,

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823 kfree(buf);
824
825 return retval;
826}
827
828void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
829 struct ath_tx_status *ts, struct ath_txq *txq)
830{
715 tid->an, tid->ac);
716 if (len >= size)
717 goto done;
718 }
719
720 for (q = 0; q < WME_NUM_AC; q++) {
721 struct ath_atx_ac *ac = &(an->ac[q]);
722 len += snprintf(buf + len, size - len,

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823 kfree(buf);
824
825 return retval;
826}
827
828void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
829 struct ath_tx_status *ts, struct ath_txq *txq)
830{
831#define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\
832 [sc->debug.tsidx].c)
831 int qnum = txq->axq_qnum;
832
833 TX_STAT_INC(qnum, tx_pkts_all);
834 sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len;
835
836 if (bf_isampdu(bf)) {
837 if (bf_isxretried(bf))
838 TX_STAT_INC(qnum, a_xretries);

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852 if (ts->ts_status & ATH9K_TXERR_TIMER_EXPIRED)
853 TX_STAT_INC(qnum, timer_exp);
854 if (ts->ts_flags & ATH9K_TX_DESC_CFG_ERR)
855 TX_STAT_INC(qnum, desc_cfg_err);
856 if (ts->ts_flags & ATH9K_TX_DATA_UNDERRUN)
857 TX_STAT_INC(qnum, data_underrun);
858 if (ts->ts_flags & ATH9K_TX_DELIM_UNDERRUN)
859 TX_STAT_INC(qnum, delim_underrun);
833 int qnum = txq->axq_qnum;
834
835 TX_STAT_INC(qnum, tx_pkts_all);
836 sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len;
837
838 if (bf_isampdu(bf)) {
839 if (bf_isxretried(bf))
840 TX_STAT_INC(qnum, a_xretries);

--- 13 unchanged lines hidden (view full) ---

854 if (ts->ts_status & ATH9K_TXERR_TIMER_EXPIRED)
855 TX_STAT_INC(qnum, timer_exp);
856 if (ts->ts_flags & ATH9K_TX_DESC_CFG_ERR)
857 TX_STAT_INC(qnum, desc_cfg_err);
858 if (ts->ts_flags & ATH9K_TX_DATA_UNDERRUN)
859 TX_STAT_INC(qnum, data_underrun);
860 if (ts->ts_flags & ATH9K_TX_DELIM_UNDERRUN)
861 TX_STAT_INC(qnum, delim_underrun);
862
863 spin_lock(&sc->debug.samp_lock);
864 TX_SAMP_DBG(jiffies) = jiffies;
865 TX_SAMP_DBG(rssi_ctl0) = ts->ts_rssi_ctl0;
866 TX_SAMP_DBG(rssi_ctl1) = ts->ts_rssi_ctl1;
867 TX_SAMP_DBG(rssi_ctl2) = ts->ts_rssi_ctl2;
868 TX_SAMP_DBG(rssi_ext0) = ts->ts_rssi_ext0;
869 TX_SAMP_DBG(rssi_ext1) = ts->ts_rssi_ext1;
870 TX_SAMP_DBG(rssi_ext2) = ts->ts_rssi_ext2;
871 TX_SAMP_DBG(rateindex) = ts->ts_rateindex;
872 TX_SAMP_DBG(isok) = !!(ts->ts_status & ATH9K_TXERR_MASK);
873 TX_SAMP_DBG(rts_fail_cnt) = ts->ts_shortretry;
874 TX_SAMP_DBG(data_fail_cnt) = ts->ts_longretry;
875 TX_SAMP_DBG(rssi) = ts->ts_rssi;
876 TX_SAMP_DBG(tid) = ts->tid;
877 TX_SAMP_DBG(qid) = ts->qid;
878 sc->debug.tsidx = (sc->debug.tsidx + 1) % ATH_DBG_MAX_SAMPLES;
879 spin_unlock(&sc->debug.samp_lock);
880
881#undef TX_SAMP_DBG
860}
861
862static const struct file_operations fops_xmit = {
863 .read = read_file_xmit,
864 .open = ath9k_debugfs_open,
865 .owner = THIS_MODULE,
866 .llseek = default_llseek,
867};

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990
991#undef PHY_ERR
992}
993
994void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
995{
996#define RX_STAT_INC(c) sc->debug.stats.rxstats.c++
997#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++
882}
883
884static const struct file_operations fops_xmit = {
885 .read = read_file_xmit,
886 .open = ath9k_debugfs_open,
887 .owner = THIS_MODULE,
888 .llseek = default_llseek,
889};

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1012
1013#undef PHY_ERR
1014}
1015
1016void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
1017{
1018#define RX_STAT_INC(c) sc->debug.stats.rxstats.c++
1019#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++
1020#define RX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].rs\
1021 [sc->debug.rsidx].c)
998
999 u32 phyerr;
1000
1001 RX_STAT_INC(rx_pkts_all);
1002 sc->debug.stats.rxstats.rx_bytes_all += rs->rs_datalen;
1003
1004 if (rs->rs_status & ATH9K_RXERR_CRC)
1005 RX_STAT_INC(crc_err);

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1025 sc->debug.stats.rxstats.rs_rssi_ctl2 = rs->rs_rssi_ctl2;
1026
1027 sc->debug.stats.rxstats.rs_rssi_ext0 = rs->rs_rssi_ext0;
1028 sc->debug.stats.rxstats.rs_rssi_ext1 = rs->rs_rssi_ext1;
1029 sc->debug.stats.rxstats.rs_rssi_ext2 = rs->rs_rssi_ext2;
1030
1031 sc->debug.stats.rxstats.rs_antenna = rs->rs_antenna;
1032
1022
1023 u32 phyerr;
1024
1025 RX_STAT_INC(rx_pkts_all);
1026 sc->debug.stats.rxstats.rx_bytes_all += rs->rs_datalen;
1027
1028 if (rs->rs_status & ATH9K_RXERR_CRC)
1029 RX_STAT_INC(crc_err);

--- 19 unchanged lines hidden (view full) ---

1049 sc->debug.stats.rxstats.rs_rssi_ctl2 = rs->rs_rssi_ctl2;
1050
1051 sc->debug.stats.rxstats.rs_rssi_ext0 = rs->rs_rssi_ext0;
1052 sc->debug.stats.rxstats.rs_rssi_ext1 = rs->rs_rssi_ext1;
1053 sc->debug.stats.rxstats.rs_rssi_ext2 = rs->rs_rssi_ext2;
1054
1055 sc->debug.stats.rxstats.rs_antenna = rs->rs_antenna;
1056
1057 spin_lock(&sc->debug.samp_lock);
1058 RX_SAMP_DBG(jiffies) = jiffies;
1059 RX_SAMP_DBG(rssi_ctl0) = rs->rs_rssi_ctl0;
1060 RX_SAMP_DBG(rssi_ctl1) = rs->rs_rssi_ctl1;
1061 RX_SAMP_DBG(rssi_ctl2) = rs->rs_rssi_ctl2;
1062 RX_SAMP_DBG(rssi_ext0) = rs->rs_rssi_ext0;
1063 RX_SAMP_DBG(rssi_ext1) = rs->rs_rssi_ext1;
1064 RX_SAMP_DBG(rssi_ext2) = rs->rs_rssi_ext2;
1065 RX_SAMP_DBG(antenna) = rs->rs_antenna;
1066 RX_SAMP_DBG(rssi) = rs->rs_rssi;
1067 RX_SAMP_DBG(rate) = rs->rs_rate;
1068 RX_SAMP_DBG(is_mybeacon) = rs->is_mybeacon;
1069
1070 sc->debug.rsidx = (sc->debug.rsidx + 1) % ATH_DBG_MAX_SAMPLES;
1071 spin_unlock(&sc->debug.samp_lock);
1072
1033#undef RX_STAT_INC
1034#undef RX_PHY_ERR_INC
1073#undef RX_STAT_INC
1074#undef RX_PHY_ERR_INC
1075#undef RX_SAMP_DBG
1035}
1036
1037static const struct file_operations fops_recv = {
1038 .read = read_file_recv,
1039 .open = ath9k_debugfs_open,
1040 .owner = THIS_MODULE,
1041 .llseek = default_llseek,
1042};

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1267
1268static const struct file_operations fops_modal_eeprom = {
1269 .read = read_file_modal_eeprom,
1270 .open = ath9k_debugfs_open,
1271 .owner = THIS_MODULE,
1272 .llseek = default_llseek,
1273};
1274
1076}
1077
1078static const struct file_operations fops_recv = {
1079 .read = read_file_recv,
1080 .open = ath9k_debugfs_open,
1081 .owner = THIS_MODULE,
1082 .llseek = default_llseek,
1083};

--- 224 unchanged lines hidden (view full) ---

1308
1309static const struct file_operations fops_modal_eeprom = {
1310 .read = read_file_modal_eeprom,
1311 .open = ath9k_debugfs_open,
1312 .owner = THIS_MODULE,
1313 .llseek = default_llseek,
1314};
1315
1316void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
1317{
1318#define ATH_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].c)
1319 struct ath_hw *ah = sc->sc_ah;
1320 struct ath_common *common = ath9k_hw_common(ah);
1321 unsigned long flags;
1322 int i;
1323
1324 ath9k_ps_wakeup(sc);
1325
1326 spin_lock_irqsave(&common->cc_lock, flags);
1327 ath_hw_cycle_counters_update(common);
1328 spin_unlock_irqrestore(&common->cc_lock, flags);
1329
1330 spin_lock_bh(&sc->debug.samp_lock);
1331
1332 ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles;
1333 ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy;
1334 ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame;
1335 ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame;
1336 ATH_SAMP_DBG(noise) = ah->noise;
1337
1338 REG_WRITE_D(ah, AR_MACMISC,
1339 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
1340 (AR_MACMISC_MISC_OBS_BUS_1 <<
1341 AR_MACMISC_MISC_OBS_BUS_MSB_S)));
1342
1343 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1344 ATH_SAMP_DBG(dma_dbg_reg_vals[i]) = REG_READ_D(ah,
1345 AR_DMADBG_0 + (i * sizeof(u32)));
1346
1347 ATH_SAMP_DBG(pcu_obs) = REG_READ_D(ah, AR_OBS_BUS_1);
1348 ATH_SAMP_DBG(pcu_cr) = REG_READ_D(ah, AR_CR);
1349
1350 memcpy(ATH_SAMP_DBG(nfCalHist), sc->caldata.nfCalHist,
1351 sizeof(ATH_SAMP_DBG(nfCalHist)));
1352
1353 sc->debug.sampidx = (sc->debug.sampidx + 1) % ATH_DBG_MAX_SAMPLES;
1354 spin_unlock_bh(&sc->debug.samp_lock);
1355 ath9k_ps_restore(sc);
1356
1357#undef ATH_SAMP_DBG
1358}
1359
1360static int open_file_bb_mac_samps(struct inode *inode, struct file *file)
1361{
1362#define ATH_SAMP_DBG(c) bb_mac_samp[sampidx].c
1363 struct ath_softc *sc = inode->i_private;
1364 struct ath_hw *ah = sc->sc_ah;
1365 struct ath_common *common = ath9k_hw_common(ah);
1366 struct ieee80211_conf *conf = &common->hw->conf;
1367 struct ath_dbg_bb_mac_samp *bb_mac_samp;
1368 struct ath9k_nfcal_hist *h;
1369 int i, j, qcuOffset = 0, dcuOffset = 0;
1370 u32 *qcuBase, *dcuBase, size = 30000, len = 0;
1371 u32 sampidx = 0;
1372 u8 *buf;
1373 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
1374 u8 nread;
1375
1376 buf = vmalloc(size);
1377 if (!buf)
1378 return -ENOMEM;
1379 bb_mac_samp = vmalloc(sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1380 if (!bb_mac_samp) {
1381 vfree(buf);
1382 return -ENOMEM;
1383 }
1384
1385 spin_lock_bh(&sc->debug.samp_lock);
1386 memcpy(bb_mac_samp, sc->debug.bb_mac_samp,
1387 sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1388 spin_unlock_bh(&sc->debug.samp_lock);
1389
1390 len += snprintf(buf + len, size - len,
1391 "Raw DMA Debug Dump:\n");
1392 len += snprintf(buf + len, size - len, "Sample |\t");
1393 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1394 len += snprintf(buf + len, size - len, " DMA Reg%d |\t", i);
1395 len += snprintf(buf + len, size - len, "\n");
1396
1397 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1398 len += snprintf(buf + len, size - len, "%d\t", sampidx);
1399
1400 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++)
1401 len += snprintf(buf + len, size - len, " %08x\t",
1402 ATH_SAMP_DBG(dma_dbg_reg_vals[i]));
1403 len += snprintf(buf + len, size - len, "\n");
1404 }
1405 len += snprintf(buf + len, size - len, "\n");
1406
1407 len += snprintf(buf + len, size - len,
1408 "Sample Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
1409 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1410 qcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[0]);
1411 dcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[4]);
1412
1413 for (i = 0; i < ATH9K_NUM_QUEUES; i++,
1414 qcuOffset += 4, dcuOffset += 5) {
1415 if (i == 8) {
1416 qcuOffset = 0;
1417 qcuBase++;
1418 }
1419
1420 if (i == 6) {
1421 dcuOffset = 0;
1422 dcuBase++;
1423 }
1424 if (!sc->debug.stats.txstats[i].queued)
1425 continue;
1426
1427 len += snprintf(buf + len, size - len,
1428 "%4d %7d %2x %1x %2x %2x\n",
1429 sampidx, i,
1430 (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
1431 (*qcuBase & (0x8 << qcuOffset)) >>
1432 (qcuOffset + 3),
1433 ATH_SAMP_DBG(dma_dbg_reg_vals[2]) &
1434 (0x7 << (i * 3)) >> (i * 3),
1435 (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
1436 }
1437 len += snprintf(buf + len, size - len, "\n");
1438 }
1439 len += snprintf(buf + len, size - len,
1440 "samp qcu_sh qcu_fh qcu_comp dcu_comp dcu_arb dcu_fp "
1441 "ch_idle_dur ch_idle_dur_val txfifo_val0 txfifo_val1 "
1442 "txfifo_dcu0 txfifo_dcu1 pcu_obs AR_CR\n");
1443
1444 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1445 qcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[0]);
1446 dcuBase = &ATH_SAMP_DBG(dma_dbg_reg_vals[4]);
1447
1448 len += snprintf(buf + len, size - len, "%4d %5x %5x ", sampidx,
1449 (ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x003c0000) >> 18,
1450 (ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x03c00000) >> 22);
1451 len += snprintf(buf + len, size - len, "%7x %8x ",
1452 (ATH_SAMP_DBG(dma_dbg_reg_vals[3]) & 0x1c000000) >> 26,
1453 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x3));
1454 len += snprintf(buf + len, size - len, "%7x %7x ",
1455 (ATH_SAMP_DBG(dma_dbg_reg_vals[5]) & 0x06000000) >> 25,
1456 (ATH_SAMP_DBG(dma_dbg_reg_vals[5]) & 0x38000000) >> 27);
1457 len += snprintf(buf + len, size - len, "%7d %12d ",
1458 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x000003fc) >> 2,
1459 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00000400) >> 10);
1460 len += snprintf(buf + len, size - len, "%12d %12d ",
1461 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00000800) >> 11,
1462 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x00001000) >> 12);
1463 len += snprintf(buf + len, size - len, "%12d %12d ",
1464 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x0001e000) >> 13,
1465 (ATH_SAMP_DBG(dma_dbg_reg_vals[6]) & 0x001e0000) >> 17);
1466 len += snprintf(buf + len, size - len, "0x%07x 0x%07x\n",
1467 ATH_SAMP_DBG(pcu_obs), ATH_SAMP_DBG(pcu_cr));
1468 }
1469
1470 len += snprintf(buf + len, size - len,
1471 "Sample ChNoise Chain privNF #Reading Readings\n");
1472 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1473 h = ATH_SAMP_DBG(nfCalHist);
1474 if (!ATH_SAMP_DBG(noise))
1475 continue;
1476
1477 for (i = 0; i < NUM_NF_READINGS; i++) {
1478 if (!(chainmask & (1 << i)) ||
1479 ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf)))
1480 continue;
1481
1482 nread = AR_PHY_CCA_FILTERWINDOW_LENGTH -
1483 h[i].invalidNFcount;
1484 len += snprintf(buf + len, size - len,
1485 "%4d %5d %4d\t %d\t %d\t",
1486 sampidx, ATH_SAMP_DBG(noise),
1487 i, h[i].privNF, nread);
1488 for (j = 0; j < nread; j++)
1489 len += snprintf(buf + len, size - len,
1490 " %d", h[i].nfCalBuffer[j]);
1491 len += snprintf(buf + len, size - len, "\n");
1492 }
1493 }
1494 len += snprintf(buf + len, size - len, "\nCycle counters:\n"
1495 "Sample Total Rxbusy Rxframes Txframes\n");
1496 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1497 if (!ATH_SAMP_DBG(cc.cycles))
1498 continue;
1499 len += snprintf(buf + len, size - len,
1500 "%4d %08x %08x %08x %08x\n",
1501 sampidx, ATH_SAMP_DBG(cc.cycles),
1502 ATH_SAMP_DBG(cc.rx_busy),
1503 ATH_SAMP_DBG(cc.rx_frame),
1504 ATH_SAMP_DBG(cc.tx_frame));
1505 }
1506
1507 len += snprintf(buf + len, size - len, "Tx status Dump :\n");
1508 len += snprintf(buf + len, size - len,
1509 "Sample rssi:- ctl0 ctl1 ctl2 ext0 ext1 ext2 comb "
1510 "isok rts_fail data_fail rate tid qid tx_before(ms)\n");
1511 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1512 for (i = 0; i < ATH_DBG_MAX_SAMPLES; i++) {
1513 if (!ATH_SAMP_DBG(ts[i].jiffies))
1514 continue;
1515 len += snprintf(buf + len, size - len, "%4d \t"
1516 "%8d %4d %4d %4d %4d %4d %4d %4d %4d "
1517 "%4d %4d %2d %2d %d\n",
1518 sampidx,
1519 ATH_SAMP_DBG(ts[i].rssi_ctl0),
1520 ATH_SAMP_DBG(ts[i].rssi_ctl1),
1521 ATH_SAMP_DBG(ts[i].rssi_ctl2),
1522 ATH_SAMP_DBG(ts[i].rssi_ext0),
1523 ATH_SAMP_DBG(ts[i].rssi_ext1),
1524 ATH_SAMP_DBG(ts[i].rssi_ext2),
1525 ATH_SAMP_DBG(ts[i].rssi),
1526 ATH_SAMP_DBG(ts[i].isok),
1527 ATH_SAMP_DBG(ts[i].rts_fail_cnt),
1528 ATH_SAMP_DBG(ts[i].data_fail_cnt),
1529 ATH_SAMP_DBG(ts[i].rateindex),
1530 ATH_SAMP_DBG(ts[i].tid),
1531 ATH_SAMP_DBG(ts[i].qid),
1532 jiffies_to_msecs(jiffies -
1533 ATH_SAMP_DBG(ts[i].jiffies)));
1534 }
1535 }
1536
1537 len += snprintf(buf + len, size - len, "Rx status Dump :\n");
1538 len += snprintf(buf + len, size - len, "Sample rssi:- ctl0 ctl1 ctl2 "
1539 "ext0 ext1 ext2 comb beacon ant rate rx_before(ms)\n");
1540 for (sampidx = 0; sampidx < ATH_DBG_MAX_SAMPLES; sampidx++) {
1541 for (i = 0; i < ATH_DBG_MAX_SAMPLES; i++) {
1542 if (!ATH_SAMP_DBG(rs[i].jiffies))
1543 continue;
1544 len += snprintf(buf + len, size - len, "%4d \t"
1545 "%8d %4d %4d %4d %4d %4d %4d %s %4d %02x %d\n",
1546 sampidx,
1547 ATH_SAMP_DBG(rs[i].rssi_ctl0),
1548 ATH_SAMP_DBG(rs[i].rssi_ctl1),
1549 ATH_SAMP_DBG(rs[i].rssi_ctl2),
1550 ATH_SAMP_DBG(rs[i].rssi_ext0),
1551 ATH_SAMP_DBG(rs[i].rssi_ext1),
1552 ATH_SAMP_DBG(rs[i].rssi_ext2),
1553 ATH_SAMP_DBG(rs[i].rssi),
1554 ATH_SAMP_DBG(rs[i].is_mybeacon) ?
1555 "True" : "False",
1556 ATH_SAMP_DBG(rs[i].antenna),
1557 ATH_SAMP_DBG(rs[i].rate),
1558 jiffies_to_msecs(jiffies -
1559 ATH_SAMP_DBG(rs[i].jiffies)));
1560 }
1561 }
1562
1563 vfree(bb_mac_samp);
1564 file->private_data = buf;
1565
1566 return 0;
1567#undef ATH_SAMP_DBG
1568}
1569
1570static const struct file_operations fops_samps = {
1571 .open = open_file_bb_mac_samps,
1572 .read = ath9k_debugfs_read_buf,
1573 .release = ath9k_debugfs_release_buf,
1574 .owner = THIS_MODULE,
1575 .llseek = default_llseek,
1576};
1577
1578
1275int ath9k_init_debug(struct ath_hw *ah)
1276{
1277 struct ath_common *common = ath9k_hw_common(ah);
1278 struct ath_softc *sc = (struct ath_softc *) common->priv;
1279
1280 sc->debug.debugfs_phy = debugfs_create_dir("ath9k",
1281 sc->hw->wiphy->debugfsdir);
1282 if (!sc->debug.debugfs_phy)

--- 33 unchanged lines hidden (view full) ---

1316 debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, sc,
1317 &fops_regdump);
1318 debugfs_create_file("dump_nfcal", S_IRUSR, sc->debug.debugfs_phy, sc,
1319 &fops_dump_nfcal);
1320 debugfs_create_file("base_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
1321 &fops_base_eeprom);
1322 debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
1323 &fops_modal_eeprom);
1579int ath9k_init_debug(struct ath_hw *ah)
1580{
1581 struct ath_common *common = ath9k_hw_common(ah);
1582 struct ath_softc *sc = (struct ath_softc *) common->priv;
1583
1584 sc->debug.debugfs_phy = debugfs_create_dir("ath9k",
1585 sc->hw->wiphy->debugfsdir);
1586 if (!sc->debug.debugfs_phy)

--- 33 unchanged lines hidden (view full) ---

1620 debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, sc,
1621 &fops_regdump);
1622 debugfs_create_file("dump_nfcal", S_IRUSR, sc->debug.debugfs_phy, sc,
1623 &fops_dump_nfcal);
1624 debugfs_create_file("base_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
1625 &fops_base_eeprom);
1626 debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
1627 &fops_modal_eeprom);
1628 debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc,
1629 &fops_samps);
1324
1325 debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR,
1326 sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
1327
1328 debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
1329 sc->debug.debugfs_phy, &sc->sc_ah->gpio_val);
1330
1331 sc->debug.regidx = 0;
1630
1631 debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR,
1632 sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
1633
1634 debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
1635 sc->debug.debugfs_phy, &sc->sc_ah->gpio_val);
1636
1637 sc->debug.regidx = 0;
1638 memset(&sc->debug.bb_mac_samp, 0, sizeof(sc->debug.bb_mac_samp));
1639 sc->debug.sampidx = 0;
1640 sc->debug.tsidx = 0;
1641 sc->debug.rsidx = 0;
1332 return 0;
1333}
1642 return 0;
1643}