btcoex.c (d2182b69dcb6a68b1ef6070b2efd094e13dea3f1) | btcoex.c (8a30930563521c9dba73c93b5631be1d0993f78f) |
---|---|
1/* 2 * Copyright (c) 2009-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 54 unchanged lines hidden (view full) --- 63 .bt_rxclear_polarity = true, 64 .bt_priority_time = 2, 65 .bt_first_slot_time = 5, 66 .bt_hold_rx_clear = true, 67 }; 68 u32 i, idx; 69 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity; 70 | 1/* 2 * Copyright (c) 2009-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 54 unchanged lines hidden (view full) --- 63 .bt_rxclear_polarity = true, 64 .bt_priority_time = 2, 65 .bt_first_slot_time = 5, 66 .bt_hold_rx_clear = true, 67 }; 68 u32 i, idx; 69 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity; 70 |
71 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 72 return; 73 |
|
71 if (AR_SREV_9300_20_OR_LATER(ah)) 72 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity; 73 74 btcoex_hw->bt_coex_mode = 75 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) | 76 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) | 77 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) | 78 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) | --- 15 unchanged lines hidden (view full) --- 94 } 95} 96EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw); 97 98void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah) 99{ 100 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 101 | 74 if (AR_SREV_9300_20_OR_LATER(ah)) 75 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity; 76 77 btcoex_hw->bt_coex_mode = 78 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) | 79 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) | 80 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) | 81 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) | --- 15 unchanged lines hidden (view full) --- 97 } 98} 99EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw); 100 101void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah) 102{ 103 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 104 |
105 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 106 return; 107 |
|
102 /* connect bt_active to baseband */ 103 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL, 104 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF | 105 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF)); 106 107 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 108 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB); 109 --- 6 unchanged lines hidden (view full) --- 116 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio); 117} 118EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire); 119 120void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah) 121{ 122 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 123 | 108 /* connect bt_active to baseband */ 109 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL, 110 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF | 111 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF)); 112 113 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 114 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB); 115 --- 6 unchanged lines hidden (view full) --- 122 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio); 123} 124EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire); 125 126void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah) 127{ 128 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 129 |
130 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 131 return; 132 |
|
124 /* btcoex 3-wire */ 125 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 126 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB | 127 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB)); 128 129 /* Set input mux for bt_prority_async and 130 * bt_active_async to GPIO pins */ 131 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, --- 10 unchanged lines hidden (view full) --- 142 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio); 143} 144EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire); 145 146static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah) 147{ 148 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 149 | 133 /* btcoex 3-wire */ 134 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 135 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB | 136 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB)); 137 138 /* Set input mux for bt_prority_async and 139 * bt_active_async to GPIO pins */ 140 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, --- 10 unchanged lines hidden (view full) --- 151 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio); 152} 153EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire); 154 155static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah) 156{ 157 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 158 |
159 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 160 return; 161 |
|
150 /* Configure the desired GPIO port for TX_FRAME output */ 151 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio, 152 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME); 153} 154 155void ath9k_hw_btcoex_set_weight(struct ath_hw *ah, 156 u32 bt_weight, 157 u32 wlan_weight) 158{ 159 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 160 | 162 /* Configure the desired GPIO port for TX_FRAME output */ 163 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio, 164 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME); 165} 166 167void ath9k_hw_btcoex_set_weight(struct ath_hw *ah, 168 u32 bt_weight, 169 u32 wlan_weight) 170{ 171 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 172 |
173 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 174 return; 175 |
|
161 btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) | 162 SM(wlan_weight, AR_BTCOEX_WL_WGHT); 163} 164EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight); 165 166 167static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah) 168{ --- 45 unchanged lines hidden (view full) --- 214 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); 215 btcoex->enabled = true; 216} 217 218void ath9k_hw_btcoex_enable(struct ath_hw *ah) 219{ 220 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 221 | 176 btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) | 177 SM(wlan_weight, AR_BTCOEX_WL_WGHT); 178} 179EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight); 180 181 182static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah) 183{ --- 45 unchanged lines hidden (view full) --- 229 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); 230 btcoex->enabled = true; 231} 232 233void ath9k_hw_btcoex_enable(struct ath_hw *ah) 234{ 235 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 236 |
222 switch (btcoex_hw->scheme) { | 237 switch (ath9k_hw_get_btcoex_scheme(ah)) { |
223 case ATH_BTCOEX_CFG_NONE: | 238 case ATH_BTCOEX_CFG_NONE: |
224 break; | 239 return; |
225 case ATH_BTCOEX_CFG_2WIRE: 226 ath9k_hw_btcoex_enable_2wire(ah); 227 break; 228 case ATH_BTCOEX_CFG_3WIRE: 229 ath9k_hw_btcoex_enable_3wire(ah); 230 break; 231 case ATH_BTCOEX_CFG_MCI: 232 ath9k_hw_btcoex_enable_mci(ah); --- 8 unchanged lines hidden (view full) --- 241} 242EXPORT_SYMBOL(ath9k_hw_btcoex_enable); 243 244void ath9k_hw_btcoex_disable(struct ath_hw *ah) 245{ 246 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 247 int i; 248 | 240 case ATH_BTCOEX_CFG_2WIRE: 241 ath9k_hw_btcoex_enable_2wire(ah); 242 break; 243 case ATH_BTCOEX_CFG_3WIRE: 244 ath9k_hw_btcoex_enable_3wire(ah); 245 break; 246 case ATH_BTCOEX_CFG_MCI: 247 ath9k_hw_btcoex_enable_mci(ah); --- 8 unchanged lines hidden (view full) --- 256} 257EXPORT_SYMBOL(ath9k_hw_btcoex_enable); 258 259void ath9k_hw_btcoex_disable(struct ath_hw *ah) 260{ 261 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; 262 int i; 263 |
264 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 265 return; 266 |
|
249 btcoex_hw->enabled = false; 250 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) { 251 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); 252 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 253 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i), 254 btcoex_hw->wlan_weight[i]); 255 } 256 ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0); --- 32 unchanged lines hidden (view full) --- 289} 290 291/* 292 * Configures appropriate weight based on stomp type. 293 */ 294void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah, 295 enum ath_stomp_type stomp_type) 296{ | 267 btcoex_hw->enabled = false; 268 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) { 269 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); 270 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) 271 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i), 272 btcoex_hw->wlan_weight[i]); 273 } 274 ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0); --- 32 unchanged lines hidden (view full) --- 307} 308 309/* 310 * Configures appropriate weight based on stomp type. 311 */ 312void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah, 313 enum ath_stomp_type stomp_type) 314{ |
315 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) 316 return; 317 |
|
297 if (AR_SREV_9300_20_OR_LATER(ah)) { 298 ar9003_btcoex_bt_stomp(ah, stomp_type); 299 return; 300 } 301 302 switch (stomp_type) { 303 case ATH_BTCOEX_STOMP_ALL: 304 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, --- 16 unchanged lines hidden --- | 318 if (AR_SREV_9300_20_OR_LATER(ah)) { 319 ar9003_btcoex_bt_stomp(ah, stomp_type); 320 return; 321 } 322 323 switch (stomp_type) { 324 case ATH_BTCOEX_STOMP_ALL: 325 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, --- 16 unchanged lines hidden --- |