mac.c (c318a821b9828ef3be97d5d896d146e7daa43c86) | mac.c (7947d3e075cde1a18e538f2dafbc850aa356ff79) |
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1/* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * --- 48 unchanged lines hidden (view full) --- 57 { .bitrate = 120, .hw_value = ATH10K_HW_RATE_OFDM_12M }, 58 { .bitrate = 180, .hw_value = ATH10K_HW_RATE_OFDM_18M }, 59 { .bitrate = 240, .hw_value = ATH10K_HW_RATE_OFDM_24M }, 60 { .bitrate = 360, .hw_value = ATH10K_HW_RATE_OFDM_36M }, 61 { .bitrate = 480, .hw_value = ATH10K_HW_RATE_OFDM_48M }, 62 { .bitrate = 540, .hw_value = ATH10K_HW_RATE_OFDM_54M }, 63}; 64 | 1/* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * --- 48 unchanged lines hidden (view full) --- 57 { .bitrate = 120, .hw_value = ATH10K_HW_RATE_OFDM_12M }, 58 { .bitrate = 180, .hw_value = ATH10K_HW_RATE_OFDM_18M }, 59 { .bitrate = 240, .hw_value = ATH10K_HW_RATE_OFDM_24M }, 60 { .bitrate = 360, .hw_value = ATH10K_HW_RATE_OFDM_36M }, 61 { .bitrate = 480, .hw_value = ATH10K_HW_RATE_OFDM_48M }, 62 { .bitrate = 540, .hw_value = ATH10K_HW_RATE_OFDM_54M }, 63}; 64 |
65static struct ieee80211_rate ath10k_rates_rev2[] = { 66 { .bitrate = 10, 67 .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_1M }, 68 { .bitrate = 20, 69 .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_2M, 70 .hw_value_short = ATH10K_HW_RATE_REV2_CCK_SP_2M, 71 .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 72 { .bitrate = 55, 73 .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_5_5M, 74 .hw_value_short = ATH10K_HW_RATE_REV2_CCK_SP_5_5M, 75 .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 76 { .bitrate = 110, 77 .hw_value = ATH10K_HW_RATE_REV2_CCK_LP_11M, 78 .hw_value_short = ATH10K_HW_RATE_REV2_CCK_SP_11M, 79 .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 80 81 { .bitrate = 60, .hw_value = ATH10K_HW_RATE_OFDM_6M }, 82 { .bitrate = 90, .hw_value = ATH10K_HW_RATE_OFDM_9M }, 83 { .bitrate = 120, .hw_value = ATH10K_HW_RATE_OFDM_12M }, 84 { .bitrate = 180, .hw_value = ATH10K_HW_RATE_OFDM_18M }, 85 { .bitrate = 240, .hw_value = ATH10K_HW_RATE_OFDM_24M }, 86 { .bitrate = 360, .hw_value = ATH10K_HW_RATE_OFDM_36M }, 87 { .bitrate = 480, .hw_value = ATH10K_HW_RATE_OFDM_48M }, 88 { .bitrate = 540, .hw_value = ATH10K_HW_RATE_OFDM_54M }, 89}; 90 |
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65#define ATH10K_MAC_FIRST_OFDM_RATE_IDX 4 66 67#define ath10k_a_rates (ath10k_rates + ATH10K_MAC_FIRST_OFDM_RATE_IDX) 68#define ath10k_a_rates_size (ARRAY_SIZE(ath10k_rates) - \ 69 ATH10K_MAC_FIRST_OFDM_RATE_IDX) 70#define ath10k_g_rates (ath10k_rates + 0) 71#define ath10k_g_rates_size (ARRAY_SIZE(ath10k_rates)) 72 | 91#define ATH10K_MAC_FIRST_OFDM_RATE_IDX 4 92 93#define ath10k_a_rates (ath10k_rates + ATH10K_MAC_FIRST_OFDM_RATE_IDX) 94#define ath10k_a_rates_size (ARRAY_SIZE(ath10k_rates) - \ 95 ATH10K_MAC_FIRST_OFDM_RATE_IDX) 96#define ath10k_g_rates (ath10k_rates + 0) 97#define ath10k_g_rates_size (ARRAY_SIZE(ath10k_rates)) 98 |
99#define ath10k_g_rates_rev2 (ath10k_rates_rev2 + 0) 100#define ath10k_g_rates_rev2_size (ARRAY_SIZE(ath10k_rates_rev2)) 101 |
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73static bool ath10k_mac_bitrate_is_cck(int bitrate) 74{ 75 switch (bitrate) { 76 case 10: 77 case 20: 78 case 55: 79 case 110: 80 return true; --- 3695 unchanged lines hidden (view full) --- 3776{ 3777 struct ieee80211_hw *hw = ar->hw; 3778 struct ieee80211_txq *txq; 3779 struct ath10k_txq *artxq; 3780 struct ath10k_txq *last; 3781 int ret; 3782 int max; 3783 | 102static bool ath10k_mac_bitrate_is_cck(int bitrate) 103{ 104 switch (bitrate) { 105 case 10: 106 case 20: 107 case 55: 108 case 110: 109 return true; --- 3695 unchanged lines hidden (view full) --- 3805{ 3806 struct ieee80211_hw *hw = ar->hw; 3807 struct ieee80211_txq *txq; 3808 struct ath10k_txq *artxq; 3809 struct ath10k_txq *last; 3810 int ret; 3811 int max; 3812 |
3813 if (ar->htt.num_pending_tx >= (ar->htt.max_num_pending_tx / 2)) 3814 return; 3815 |
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3784 spin_lock_bh(&ar->txqs_lock); 3785 rcu_read_lock(); 3786 3787 last = list_last_entry(&ar->txqs, struct ath10k_txq, list); 3788 while (!list_empty(&ar->txqs)) { 3789 artxq = list_first_entry(&ar->txqs, struct ath10k_txq, list); 3790 txq = container_of((void *)artxq, struct ieee80211_txq, 3791 drv_priv); --- 29 unchanged lines hidden (view full) --- 3821{ 3822 lockdep_assert_held(&ar->data_lock); 3823 3824 switch (ar->scan.state) { 3825 case ATH10K_SCAN_IDLE: 3826 break; 3827 case ATH10K_SCAN_RUNNING: 3828 case ATH10K_SCAN_ABORTING: | 3816 spin_lock_bh(&ar->txqs_lock); 3817 rcu_read_lock(); 3818 3819 last = list_last_entry(&ar->txqs, struct ath10k_txq, list); 3820 while (!list_empty(&ar->txqs)) { 3821 artxq = list_first_entry(&ar->txqs, struct ath10k_txq, list); 3822 txq = container_of((void *)artxq, struct ieee80211_txq, 3823 drv_priv); --- 29 unchanged lines hidden (view full) --- 3853{ 3854 lockdep_assert_held(&ar->data_lock); 3855 3856 switch (ar->scan.state) { 3857 case ATH10K_SCAN_IDLE: 3858 break; 3859 case ATH10K_SCAN_RUNNING: 3860 case ATH10K_SCAN_ABORTING: |
3829 if (!ar->scan.is_roc) 3830 ieee80211_scan_completed(ar->hw, 3831 (ar->scan.state == 3832 ATH10K_SCAN_ABORTING)); 3833 else if (ar->scan.roc_notify) | 3861 if (!ar->scan.is_roc) { 3862 struct cfg80211_scan_info info = { 3863 .aborted = (ar->scan.state == 3864 ATH10K_SCAN_ABORTING), 3865 }; 3866 3867 ieee80211_scan_completed(ar->hw, &info); 3868 } else if (ar->scan.roc_notify) { |
3834 ieee80211_remain_on_channel_expired(ar->hw); | 3869 ieee80211_remain_on_channel_expired(ar->hw); |
3870 } |
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3835 /* fall through */ 3836 case ATH10K_SCAN_STARTING: 3837 ar->scan.state = ATH10K_SCAN_IDLE; 3838 ar->scan_channel = NULL; 3839 ar->scan.roc_freq = 0; 3840 ath10k_offchan_tx_purge(ar); 3841 cancel_delayed_work(&ar->scan.timeout); 3842 complete_all(&ar->scan.completed); --- 203 unchanged lines hidden (view full) --- 4046 struct ath10k *ar = hw->priv; 4047 struct ath10k_txq *artxq = (void *)txq->drv_priv; 4048 4049 spin_lock_bh(&ar->txqs_lock); 4050 if (list_empty(&artxq->list)) 4051 list_add_tail(&artxq->list, &ar->txqs); 4052 spin_unlock_bh(&ar->txqs_lock); 4053 | 3871 /* fall through */ 3872 case ATH10K_SCAN_STARTING: 3873 ar->scan.state = ATH10K_SCAN_IDLE; 3874 ar->scan_channel = NULL; 3875 ar->scan.roc_freq = 0; 3876 ath10k_offchan_tx_purge(ar); 3877 cancel_delayed_work(&ar->scan.timeout); 3878 complete_all(&ar->scan.completed); --- 203 unchanged lines hidden (view full) --- 4082 struct ath10k *ar = hw->priv; 4083 struct ath10k_txq *artxq = (void *)txq->drv_priv; 4084 4085 spin_lock_bh(&ar->txqs_lock); 4086 if (list_empty(&artxq->list)) 4087 list_add_tail(&artxq->list, &ar->txqs); 4088 spin_unlock_bh(&ar->txqs_lock); 4089 |
4054 if (ath10k_mac_tx_can_push(hw, txq)) 4055 tasklet_schedule(&ar->htt.txrx_compl_task); 4056 | 4090 ath10k_mac_tx_push_pending(ar); |
4057 ath10k_htt_tx_txq_update(hw, txq); 4058} 4059 4060/* Must not be called with conf_mutex held as workers can use that also. */ 4061void ath10k_drain_tx(struct ath10k *ar) 4062{ 4063 /* make sure rcu-protected mac80211 tx path itself is drained */ 4064 synchronize_net(); --- 397 unchanged lines hidden (view full) --- 4462 if (ret) { 4463 ath10k_warn(ar, 4464 "failed to set peer stats period : %d\n", 4465 ret); 4466 goto err_core_stop; 4467 } 4468 } 4469 | 4091 ath10k_htt_tx_txq_update(hw, txq); 4092} 4093 4094/* Must not be called with conf_mutex held as workers can use that also. */ 4095void ath10k_drain_tx(struct ath10k *ar) 4096{ 4097 /* make sure rcu-protected mac80211 tx path itself is drained */ 4098 synchronize_net(); --- 397 unchanged lines hidden (view full) --- 4496 if (ret) { 4497 ath10k_warn(ar, 4498 "failed to set peer stats period : %d\n", 4499 ret); 4500 goto err_core_stop; 4501 } 4502 } 4503 |
4504 param = ar->wmi.pdev_param->enable_btcoex; 4505 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 4506 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 4507 ar->running_fw->fw_file.fw_features)) { 4508 ret = ath10k_wmi_pdev_set_param(ar, param, 0); 4509 if (ret) { 4510 ath10k_warn(ar, 4511 "failed to set btcoex param: %d\n", ret); 4512 goto err_core_stop; 4513 } 4514 clear_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags); 4515 } 4516 |
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4470 ar->num_started_vdevs = 0; 4471 ath10k_regd_update(ar); 4472 4473 ath10k_spectral_start(ar); 4474 ath10k_thermal_set_throttling(ar); 4475 4476 mutex_unlock(&ar->conf_mutex); 4477 return 0; --- 3212 unchanged lines hidden (view full) --- 7690 if (!channels) { 7691 ret = -ENOMEM; 7692 goto err_free; 7693 } 7694 7695 band = &ar->mac.sbands[NL80211_BAND_2GHZ]; 7696 band->n_channels = ARRAY_SIZE(ath10k_2ghz_channels); 7697 band->channels = channels; | 4517 ar->num_started_vdevs = 0; 4518 ath10k_regd_update(ar); 4519 4520 ath10k_spectral_start(ar); 4521 ath10k_thermal_set_throttling(ar); 4522 4523 mutex_unlock(&ar->conf_mutex); 4524 return 0; --- 3212 unchanged lines hidden (view full) --- 7737 if (!channels) { 7738 ret = -ENOMEM; 7739 goto err_free; 7740 } 7741 7742 band = &ar->mac.sbands[NL80211_BAND_2GHZ]; 7743 band->n_channels = ARRAY_SIZE(ath10k_2ghz_channels); 7744 band->channels = channels; |
7698 band->n_bitrates = ath10k_g_rates_size; 7699 band->bitrates = ath10k_g_rates; | |
7700 | 7745 |
7746 if (ar->hw_params.cck_rate_map_rev2) { 7747 band->n_bitrates = ath10k_g_rates_rev2_size; 7748 band->bitrates = ath10k_g_rates_rev2; 7749 } else { 7750 band->n_bitrates = ath10k_g_rates_size; 7751 band->bitrates = ath10k_g_rates; 7752 } 7753 |
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7701 ar->hw->wiphy->bands[NL80211_BAND_2GHZ] = band; 7702 } 7703 7704 if (ar->phy_capability & WHAL_WLAN_11A_CAPABILITY) { 7705 channels = kmemdup(ath10k_5ghz_channels, 7706 sizeof(ath10k_5ghz_channels), 7707 GFP_KERNEL); 7708 if (!channels) { --- 216 unchanged lines hidden --- | 7754 ar->hw->wiphy->bands[NL80211_BAND_2GHZ] = band; 7755 } 7756 7757 if (ar->phy_capability & WHAL_WLAN_11A_CAPABILITY) { 7758 channels = kmemdup(ath10k_5ghz_channels, 7759 sizeof(ath10k_5ghz_channels), 7760 GFP_KERNEL); 7761 if (!channels) { --- 216 unchanged lines hidden --- |