hd64570.h (1da177e4c3f41524e886b7f1b8a0c1fc7321cac2) hd64570.h (ba2d3587912f82d1ab4367975b1df460db60fb1e)
1#ifndef __HD64570_H
2#define __HD64570_H
3
4/* SCA HD64570 register definitions - all addresses for mode 0 (8086 MPU)
5 and 1 (64180 MPU). For modes 2 and 3, XOR the address with 0x01.
6
7 Source: HD64570 SCA User's Manual
8*/

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148/* Descriptor Structure */
149
150typedef struct {
151 u16 cp; /* Chain Pointer */
152 u32 bp; /* Buffer Pointer (24 bits) */
153 u16 len; /* Data Length */
154 u8 stat; /* Status */
155 u8 unused; /* pads to 2-byte boundary */
1#ifndef __HD64570_H
2#define __HD64570_H
3
4/* SCA HD64570 register definitions - all addresses for mode 0 (8086 MPU)
5 and 1 (64180 MPU). For modes 2 and 3, XOR the address with 0x01.
6
7 Source: HD64570 SCA User's Manual
8*/

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148/* Descriptor Structure */
149
150typedef struct {
151 u16 cp; /* Chain Pointer */
152 u32 bp; /* Buffer Pointer (24 bits) */
153 u16 len; /* Data Length */
154 u8 stat; /* Status */
155 u8 unused; /* pads to 2-byte boundary */
156}__attribute__ ((packed)) pkt_desc;
156}__packed pkt_desc;
157
158
159/* Packet Descriptor Status bits */
160
161#define ST_TX_EOM 0x80 /* End of frame */
162#define ST_TX_EOT 0x01 /* End of transmition */
163
164#define ST_RX_EOM 0x80 /* End of frame */

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157
158
159/* Packet Descriptor Status bits */
160
161#define ST_TX_EOM 0x80 /* End of frame */
162#define ST_TX_EOT 0x01 /* End of transmition */
163
164#define ST_RX_EOM 0x80 /* End of frame */

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