smsc95xx.c (1a1494def7eacbd25db05185aa2e81ef90892460) smsc95xx.c (9624531701ea84f4b7eb966284b53b34b1c52365)
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.

--- 12 unchanged lines hidden (view full) ---

21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.

--- 12 unchanged lines hidden (view full) ---

21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
29#include <linux/bitrev.h>
30#include <linux/crc16.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include <linux/slab.h>
32#include "smsc95xx.h"
33
34#define SMSC_CHIPNAME "smsc95xx"
35#define SMSC_DRIVER_VERSION "1.0.4"
36#define HS_USB_PKT_SIZE (512)

--- 4 unchanged lines hidden (view full) ---

41#define MAX_SINGLE_PACKET_SIZE (2048)
42#define LAN95XX_EEPROM_MAGIC (0x9500)
43#define EEPROM_MAC_OFFSET (0x01)
44#define DEFAULT_TX_CSUM_ENABLE (true)
45#define DEFAULT_RX_CSUM_ENABLE (true)
46#define SMSC95XX_INTERNAL_PHY_ID (1)
47#define SMSC95XX_TX_OVERHEAD (8)
48#define SMSC95XX_TX_OVERHEAD_CSUM (12)
31#include <linux/crc32.h>
32#include <linux/usb/usbnet.h>
33#include <linux/slab.h>
34#include "smsc95xx.h"
35
36#define SMSC_CHIPNAME "smsc95xx"
37#define SMSC_DRIVER_VERSION "1.0.4"
38#define HS_USB_PKT_SIZE (512)

--- 4 unchanged lines hidden (view full) ---

43#define MAX_SINGLE_PACKET_SIZE (2048)
44#define LAN95XX_EEPROM_MAGIC (0x9500)
45#define EEPROM_MAC_OFFSET (0x01)
46#define DEFAULT_TX_CSUM_ENABLE (true)
47#define DEFAULT_RX_CSUM_ENABLE (true)
48#define SMSC95XX_INTERNAL_PHY_ID (1)
49#define SMSC95XX_TX_OVERHEAD (8)
50#define SMSC95XX_TX_OVERHEAD_CSUM (12)
49#define SUPPORTED_WAKE (WAKE_MAGIC)
51#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
52 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
50
53
51#define check_warn(ret, fmt, args...) \
52 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
54#define FEATURE_8_WAKEUP_FILTERS (0x01)
55#define FEATURE_PHY_NLP_CROSSOVER (0x02)
56#define FEATURE_AUTOSUSPEND (0x04)
53
57
54#define check_warn_return(ret, fmt, args...) \
55 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
56
57#define check_warn_goto_done(ret, fmt, args...) \
58 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
59
60struct smsc95xx_priv {
61 u32 mac_cr;
62 u32 hash_hi;
63 u32 hash_lo;
64 u32 wolopts;
65 spinlock_t mac_cr_lock;
58struct smsc95xx_priv {
59 u32 mac_cr;
60 u32 hash_hi;
61 u32 hash_lo;
62 u32 wolopts;
63 spinlock_t mac_cr_lock;
64 u8 features;
66};
67
65};
66
68struct usb_context {
69 struct usb_ctrlrequest req;
70 struct usbnet *dev;
71};
72
73static bool turbo_mode = true;
74module_param(turbo_mode, bool, 0644);
75MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
76
67static bool turbo_mode = true;
68module_param(turbo_mode, bool, 0644);
69MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
70
77static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
78 u32 *data)
71static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
72 u32 *data, int in_pm)
79{
73{
80 u32 *buf = kmalloc(4, GFP_KERNEL);
74 u32 buf;
81 int ret;
75 int ret;
76 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
82
83 BUG_ON(!dev);
84
77
78 BUG_ON(!dev);
79
85 if (!buf)
86 return -ENOMEM;
80 if (!in_pm)
81 fn = usbnet_read_cmd;
82 else
83 fn = usbnet_read_cmd_nopm;
87
84
88 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
89 USB_VENDOR_REQUEST_READ_REGISTER,
90 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
91 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
92
85 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
86 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
87 0, index, &buf, 4);
93 if (unlikely(ret < 0))
88 if (unlikely(ret < 0))
94 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
89 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
90 index, ret);
95
91
96 le32_to_cpus(buf);
97 *data = *buf;
98 kfree(buf);
92 le32_to_cpus(&buf);
93 *data = buf;
99
100 return ret;
101}
102
94
95 return ret;
96}
97
103static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
104 u32 data)
98static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
99 u32 data, int in_pm)
105{
100{
106 u32 *buf = kmalloc(4, GFP_KERNEL);
101 u32 buf;
107 int ret;
102 int ret;
103 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
108
109 BUG_ON(!dev);
110
104
105 BUG_ON(!dev);
106
111 if (!buf)
112 return -ENOMEM;
107 if (!in_pm)
108 fn = usbnet_write_cmd;
109 else
110 fn = usbnet_write_cmd_nopm;
113
111
114 *buf = data;
115 cpu_to_le32s(buf);
112 buf = data;
113 cpu_to_le32s(&buf);
116
114
117 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
118 USB_VENDOR_REQUEST_WRITE_REGISTER,
119 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
120 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
121
115 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
116 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
117 0, index, &buf, 4);
122 if (unlikely(ret < 0))
118 if (unlikely(ret < 0))
123 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
119 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
120 index, ret);
124
121
125 kfree(buf);
126
127 return ret;
128}
129
122 return ret;
123}
124
130static int smsc95xx_set_feature(struct usbnet *dev, u32 feature)
125static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
126 u32 *data)
131{
127{
132 if (WARN_ON_ONCE(!dev))
133 return -EINVAL;
128 return __smsc95xx_read_reg(dev, index, data, 1);
129}
134
130
135 cpu_to_le32s(&feature);
136
137 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
138 USB_REQ_SET_FEATURE, USB_RECIP_DEVICE, feature, 0, NULL, 0,
139 USB_CTRL_SET_TIMEOUT);
131static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
132 u32 data)
133{
134 return __smsc95xx_write_reg(dev, index, data, 1);
140}
141
135}
136
142static int smsc95xx_clear_feature(struct usbnet *dev, u32 feature)
137static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
138 u32 *data)
143{
139{
144 if (WARN_ON_ONCE(!dev))
145 return -EINVAL;
140 return __smsc95xx_read_reg(dev, index, data, 0);
141}
146
142
147 cpu_to_le32s(&feature);
148
149 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
150 USB_REQ_CLEAR_FEATURE, USB_RECIP_DEVICE, feature, 0, NULL, 0,
151 USB_CTRL_SET_TIMEOUT);
143static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
144 u32 data)
145{
146 return __smsc95xx_write_reg(dev, index, data, 0);
152}
153
154/* Loop until the read is completed with timeout
155 * called with phy_mutex held */
147}
148
149/* Loop until the read is completed with timeout
150 * called with phy_mutex held */
156static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev)
151static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
152 int in_pm)
157{
158 unsigned long start_time = jiffies;
159 u32 val;
160 int ret;
161
162 do {
153{
154 unsigned long start_time = jiffies;
155 u32 val;
156 int ret;
157
158 do {
163 ret = smsc95xx_read_reg(dev, MII_ADDR, &val);
164 check_warn_return(ret, "Error reading MII_ACCESS");
159 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
160 if (ret < 0) {
161 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
162 return ret;
163 }
164
165 if (!(val & MII_BUSY_))
166 return 0;
167 } while (!time_after(jiffies, start_time + HZ));
168
169 return -EIO;
170}
171
165 if (!(val & MII_BUSY_))
166 return 0;
167 } while (!time_after(jiffies, start_time + HZ));
168
169 return -EIO;
170}
171
172static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
172static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
173 int in_pm)
173{
174 struct usbnet *dev = netdev_priv(netdev);
175 u32 val, addr;
176 int ret;
177
178 mutex_lock(&dev->phy_mutex);
179
180 /* confirm MII not busy */
174{
175 struct usbnet *dev = netdev_priv(netdev);
176 u32 val, addr;
177 int ret;
178
179 mutex_lock(&dev->phy_mutex);
180
181 /* confirm MII not busy */
181 ret = smsc95xx_phy_wait_not_busy(dev);
182 check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_read");
182 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
183 if (ret < 0) {
184 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
185 goto done;
186 }
183
184 /* set the address, index & direction (read from PHY) */
185 phy_id &= dev->mii.phy_id_mask;
186 idx &= dev->mii.reg_num_mask;
187 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
187
188 /* set the address, index & direction (read from PHY) */
189 phy_id &= dev->mii.phy_id_mask;
190 idx &= dev->mii.reg_num_mask;
191 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
188 ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
189 check_warn_goto_done(ret, "Error writing MII_ADDR");
192 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
193 if (ret < 0) {
194 netdev_warn(dev->net, "Error writing MII_ADDR\n");
195 goto done;
196 }
190
197
191 ret = smsc95xx_phy_wait_not_busy(dev);
192 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
198 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
199 if (ret < 0) {
200 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
201 goto done;
202 }
193
203
194 ret = smsc95xx_read_reg(dev, MII_DATA, &val);
195 check_warn_goto_done(ret, "Error reading MII_DATA");
204 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
205 if (ret < 0) {
206 netdev_warn(dev->net, "Error reading MII_DATA\n");
207 goto done;
208 }
196
197 ret = (u16)(val & 0xFFFF);
198
199done:
200 mutex_unlock(&dev->phy_mutex);
201 return ret;
202}
203
209
210 ret = (u16)(val & 0xFFFF);
211
212done:
213 mutex_unlock(&dev->phy_mutex);
214 return ret;
215}
216
204static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
205 int regval)
217static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
218 int idx, int regval, int in_pm)
206{
207 struct usbnet *dev = netdev_priv(netdev);
208 u32 val, addr;
209 int ret;
210
211 mutex_lock(&dev->phy_mutex);
212
213 /* confirm MII not busy */
219{
220 struct usbnet *dev = netdev_priv(netdev);
221 u32 val, addr;
222 int ret;
223
224 mutex_lock(&dev->phy_mutex);
225
226 /* confirm MII not busy */
214 ret = smsc95xx_phy_wait_not_busy(dev);
215 check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_write");
227 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
228 if (ret < 0) {
229 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
230 goto done;
231 }
216
217 val = regval;
232
233 val = regval;
218 ret = smsc95xx_write_reg(dev, MII_DATA, val);
219 check_warn_goto_done(ret, "Error writing MII_DATA");
234 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
235 if (ret < 0) {
236 netdev_warn(dev->net, "Error writing MII_DATA\n");
237 goto done;
238 }
220
221 /* set the address, index & direction (write to PHY) */
222 phy_id &= dev->mii.phy_id_mask;
223 idx &= dev->mii.reg_num_mask;
224 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
239
240 /* set the address, index & direction (write to PHY) */
241 phy_id &= dev->mii.phy_id_mask;
242 idx &= dev->mii.reg_num_mask;
243 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
225 ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
226 check_warn_goto_done(ret, "Error writing MII_ADDR");
244 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
245 if (ret < 0) {
246 netdev_warn(dev->net, "Error writing MII_ADDR\n");
247 goto done;
248 }
227
249
228 ret = smsc95xx_phy_wait_not_busy(dev);
229 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
250 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
251 if (ret < 0) {
252 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
253 goto done;
254 }
230
231done:
232 mutex_unlock(&dev->phy_mutex);
233}
234
255
256done:
257 mutex_unlock(&dev->phy_mutex);
258}
259
260static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
261 int idx)
262{
263 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
264}
265
266static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
267 int idx, int regval)
268{
269 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
270}
271
272static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
273{
274 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
275}
276
277static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
278 int regval)
279{
280 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
281}
282
235static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
236{
237 unsigned long start_time = jiffies;
238 u32 val;
239 int ret;
240
241 do {
242 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
283static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
284{
285 unsigned long start_time = jiffies;
286 u32 val;
287 int ret;
288
289 do {
290 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
243 check_warn_return(ret, "Error reading E2P_CMD");
291 if (ret < 0) {
292 netdev_warn(dev->net, "Error reading E2P_CMD\n");
293 return ret;
294 }
295
244 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
245 break;
246 udelay(40);
247 } while (!time_after(jiffies, start_time + HZ));
248
249 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
250 netdev_warn(dev->net, "EEPROM read operation timeout\n");
251 return -EIO;

--- 5 unchanged lines hidden (view full) ---

257static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
258{
259 unsigned long start_time = jiffies;
260 u32 val;
261 int ret;
262
263 do {
264 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
296 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
297 break;
298 udelay(40);
299 } while (!time_after(jiffies, start_time + HZ));
300
301 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
302 netdev_warn(dev->net, "EEPROM read operation timeout\n");
303 return -EIO;

--- 5 unchanged lines hidden (view full) ---

309static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
310{
311 unsigned long start_time = jiffies;
312 u32 val;
313 int ret;
314
315 do {
316 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
265 check_warn_return(ret, "Error reading E2P_CMD");
317 if (ret < 0) {
318 netdev_warn(dev->net, "Error reading E2P_CMD\n");
319 return ret;
320 }
266
267 if (!(val & E2P_CMD_BUSY_))
268 return 0;
269
270 udelay(40);
271 } while (!time_after(jiffies, start_time + HZ));
272
273 netdev_warn(dev->net, "EEPROM is busy\n");

--- 11 unchanged lines hidden (view full) ---

285
286 ret = smsc95xx_eeprom_confirm_not_busy(dev);
287 if (ret)
288 return ret;
289
290 for (i = 0; i < length; i++) {
291 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
292 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
321
322 if (!(val & E2P_CMD_BUSY_))
323 return 0;
324
325 udelay(40);
326 } while (!time_after(jiffies, start_time + HZ));
327
328 netdev_warn(dev->net, "EEPROM is busy\n");

--- 11 unchanged lines hidden (view full) ---

340
341 ret = smsc95xx_eeprom_confirm_not_busy(dev);
342 if (ret)
343 return ret;
344
345 for (i = 0; i < length; i++) {
346 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
347 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
293 check_warn_return(ret, "Error writing E2P_CMD");
348 if (ret < 0) {
349 netdev_warn(dev->net, "Error writing E2P_CMD\n");
350 return ret;
351 }
294
295 ret = smsc95xx_wait_eeprom(dev);
296 if (ret < 0)
297 return ret;
298
299 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
352
353 ret = smsc95xx_wait_eeprom(dev);
354 if (ret < 0)
355 return ret;
356
357 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
300 check_warn_return(ret, "Error reading E2P_DATA");
358 if (ret < 0) {
359 netdev_warn(dev->net, "Error reading E2P_DATA\n");
360 return ret;
361 }
301
302 data[i] = val & 0xFF;
303 offset++;
304 }
305
306 return 0;
307}
308

--- 8 unchanged lines hidden (view full) ---

317
318 ret = smsc95xx_eeprom_confirm_not_busy(dev);
319 if (ret)
320 return ret;
321
322 /* Issue write/erase enable command */
323 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
324 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
362
363 data[i] = val & 0xFF;
364 offset++;
365 }
366
367 return 0;
368}
369

--- 8 unchanged lines hidden (view full) ---

378
379 ret = smsc95xx_eeprom_confirm_not_busy(dev);
380 if (ret)
381 return ret;
382
383 /* Issue write/erase enable command */
384 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
385 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
325 check_warn_return(ret, "Error writing E2P_DATA");
386 if (ret < 0) {
387 netdev_warn(dev->net, "Error writing E2P_DATA\n");
388 return ret;
389 }
326
327 ret = smsc95xx_wait_eeprom(dev);
328 if (ret < 0)
329 return ret;
330
331 for (i = 0; i < length; i++) {
332
333 /* Fill data register */
334 val = data[i];
335 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
390
391 ret = smsc95xx_wait_eeprom(dev);
392 if (ret < 0)
393 return ret;
394
395 for (i = 0; i < length; i++) {
396
397 /* Fill data register */
398 val = data[i];
399 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
336 check_warn_return(ret, "Error writing E2P_DATA");
400 if (ret < 0) {
401 netdev_warn(dev->net, "Error writing E2P_DATA\n");
402 return ret;
403 }
337
338 /* Send "write" command */
339 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
340 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
404
405 /* Send "write" command */
406 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
407 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
341 check_warn_return(ret, "Error writing E2P_CMD");
408 if (ret < 0) {
409 netdev_warn(dev->net, "Error writing E2P_CMD\n");
410 return ret;
411 }
342
343 ret = smsc95xx_wait_eeprom(dev);
344 if (ret < 0)
345 return ret;
346
347 offset++;
348 }
349
350 return 0;
351}
352
412
413 ret = smsc95xx_wait_eeprom(dev);
414 if (ret < 0)
415 return ret;
416
417 offset++;
418 }
419
420 return 0;
421}
422
353static void smsc95xx_async_cmd_callback(struct urb *urb)
354{
355 struct usb_context *usb_context = urb->context;
356 struct usbnet *dev = usb_context->dev;
357 int status = urb->status;
358
359 check_warn(status, "async callback failed with %d\n", status);
360
361 kfree(usb_context);
362 usb_free_urb(urb);
363}
364
365static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
366 u32 *data)
367{
423static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
424 u32 *data)
425{
368 struct usb_context *usb_context;
369 int status;
370 struct urb *urb;
371 const u16 size = 4;
426 const u16 size = 4;
427 int ret;
372
428
373 urb = usb_alloc_urb(0, GFP_ATOMIC);
374 if (!urb) {
375 netdev_warn(dev->net, "Error allocating URB\n");
376 return -ENOMEM;
377 }
378
379 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
380 if (usb_context == NULL) {
381 netdev_warn(dev->net, "Error allocating control msg\n");
382 usb_free_urb(urb);
383 return -ENOMEM;
384 }
385
386 usb_context->req.bRequestType =
387 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
388 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
389 usb_context->req.wValue = 00;
390 usb_context->req.wIndex = cpu_to_le16(index);
391 usb_context->req.wLength = cpu_to_le16(size);
392
393 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
394 (void *)&usb_context->req, data, size,
395 smsc95xx_async_cmd_callback,
396 (void *)usb_context);
397
398 status = usb_submit_urb(urb, GFP_ATOMIC);
399 if (status < 0) {
400 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
401 status);
402 kfree(usb_context);
403 usb_free_urb(urb);
404 }
405
406 return status;
429 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
430 USB_DIR_OUT | USB_TYPE_VENDOR |
431 USB_RECIP_DEVICE,
432 0, index, data, size);
433 if (ret < 0)
434 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
435 ret);
436 return ret;
407}
408
409/* returns hash bit number for given MAC address
410 * example:
411 * 01 00 5E 00 00 01 -> returns bit number 31 */
412static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
413{
414 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;

--- 41 unchanged lines hidden (view full) ---

456 pdata->mac_cr &=
457 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
458 }
459
460 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
461
462 /* Initiate async writes, as we can't wait for completion here */
463 ret = smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
437}
438
439/* returns hash bit number for given MAC address
440 * example:
441 * 01 00 5E 00 00 01 -> returns bit number 31 */
442static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
443{
444 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;

--- 41 unchanged lines hidden (view full) ---

486 pdata->mac_cr &=
487 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
488 }
489
490 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
491
492 /* Initiate async writes, as we can't wait for completion here */
493 ret = smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
464 check_warn(ret, "failed to initiate async write to HASHH");
494 if (ret < 0)
495 netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
465
466 ret = smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
496
497 ret = smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
467 check_warn(ret, "failed to initiate async write to HASHL");
498 if (ret < 0)
499 netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
468
469 ret = smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
500
501 ret = smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
470 check_warn(ret, "failed to initiate async write to MAC_CR");
502 if (ret < 0)
503 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
471}
472
473static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
474 u16 lcladv, u16 rmtadv)
475{
476 u32 flow, afc_cfg = 0;
477
478 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
504}
505
506static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
507 u16 lcladv, u16 rmtadv)
508{
509 u32 flow, afc_cfg = 0;
510
511 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
479 check_warn_return(ret, "Error reading AFC_CFG");
512 if (ret < 0) {
513 netdev_warn(dev->net, "Error reading AFC_CFG\n");
514 return ret;
515 }
480
481 if (duplex == DUPLEX_FULL) {
482 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
483
484 if (cap & FLOW_CTRL_RX)
485 flow = 0xFFFF0002;
486 else
487 flow = 0;

--- 8 unchanged lines hidden (view full) ---

496 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
497 } else {
498 netif_dbg(dev, link, dev->net, "half duplex\n");
499 flow = 0;
500 afc_cfg |= 0xF;
501 }
502
503 ret = smsc95xx_write_reg(dev, FLOW, flow);
516
517 if (duplex == DUPLEX_FULL) {
518 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
519
520 if (cap & FLOW_CTRL_RX)
521 flow = 0xFFFF0002;
522 else
523 flow = 0;

--- 8 unchanged lines hidden (view full) ---

532 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
533 } else {
534 netif_dbg(dev, link, dev->net, "half duplex\n");
535 flow = 0;
536 afc_cfg |= 0xF;
537 }
538
539 ret = smsc95xx_write_reg(dev, FLOW, flow);
504 check_warn_return(ret, "Error writing FLOW");
540 if (ret < 0) {
541 netdev_warn(dev->net, "Error writing FLOW\n");
542 return ret;
543 }
505
506 ret = smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
544
545 ret = smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
507 check_warn_return(ret, "Error writing AFC_CFG");
546 if (ret < 0)
547 netdev_warn(dev->net, "Error writing AFC_CFG\n");
508
548
509 return 0;
549 return ret;
510}
511
512static int smsc95xx_link_reset(struct usbnet *dev)
513{
514 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
515 struct mii_if_info *mii = &dev->mii;
516 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
517 unsigned long flags;
518 u16 lcladv, rmtadv;
519 int ret;
520
521 /* clear interrupt status */
522 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
550}
551
552static int smsc95xx_link_reset(struct usbnet *dev)
553{
554 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
555 struct mii_if_info *mii = &dev->mii;
556 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
557 unsigned long flags;
558 u16 lcladv, rmtadv;
559 int ret;
560
561 /* clear interrupt status */
562 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
523 check_warn_return(ret, "Error reading PHY_INT_SRC");
563 if (ret < 0) {
564 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
565 return ret;
566 }
524
525 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
567
568 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
526 check_warn_return(ret, "Error writing INT_STS");
569 if (ret < 0) {
570 netdev_warn(dev->net, "Error writing INT_STS\n");
571 return ret;
572 }
527
528 mii_check_media(mii, 1, 1);
529 mii_ethtool_gset(&dev->mii, &ecmd);
530 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
531 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
532
533 netif_dbg(dev, link, dev->net,
534 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",

--- 5 unchanged lines hidden (view full) ---

540 pdata->mac_cr |= MAC_CR_RCVOWN_;
541 } else {
542 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
543 pdata->mac_cr |= MAC_CR_FDPX_;
544 }
545 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
546
547 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
573
574 mii_check_media(mii, 1, 1);
575 mii_ethtool_gset(&dev->mii, &ecmd);
576 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
577 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
578
579 netif_dbg(dev, link, dev->net,
580 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",

--- 5 unchanged lines hidden (view full) ---

586 pdata->mac_cr |= MAC_CR_RCVOWN_;
587 } else {
588 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
589 pdata->mac_cr |= MAC_CR_FDPX_;
590 }
591 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
592
593 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
548 check_warn_return(ret, "Error writing MAC_CR");
594 if (ret < 0) {
595 netdev_warn(dev->net, "Error writing MAC_CR\n");
596 return ret;
597 }
549
550 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
598
599 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
551 check_warn_return(ret, "Error updating PHY flow control");
600 if (ret < 0)
601 netdev_warn(dev->net, "Error updating PHY flow control\n");
552
602
553 return 0;
603 return ret;
554}
555
556static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
557{
558 u32 intdata;
559
560 if (urb->actual_length != 4) {
561 netdev_warn(dev->net, "unexpected urb length %d\n",

--- 17 unchanged lines hidden (view full) ---

579static int smsc95xx_set_features(struct net_device *netdev,
580 netdev_features_t features)
581{
582 struct usbnet *dev = netdev_priv(netdev);
583 u32 read_buf;
584 int ret;
585
586 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
604}
605
606static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
607{
608 u32 intdata;
609
610 if (urb->actual_length != 4) {
611 netdev_warn(dev->net, "unexpected urb length %d\n",

--- 17 unchanged lines hidden (view full) ---

629static int smsc95xx_set_features(struct net_device *netdev,
630 netdev_features_t features)
631{
632 struct usbnet *dev = netdev_priv(netdev);
633 u32 read_buf;
634 int ret;
635
636 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
587 check_warn_return(ret, "Failed to read COE_CR: %d\n", ret);
637 if (ret < 0) {
638 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
639 return ret;
640 }
588
589 if (features & NETIF_F_HW_CSUM)
590 read_buf |= Tx_COE_EN_;
591 else
592 read_buf &= ~Tx_COE_EN_;
593
594 if (features & NETIF_F_RXCSUM)
595 read_buf |= Rx_COE_EN_;
596 else
597 read_buf &= ~Rx_COE_EN_;
598
599 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
641
642 if (features & NETIF_F_HW_CSUM)
643 read_buf |= Tx_COE_EN_;
644 else
645 read_buf &= ~Tx_COE_EN_;
646
647 if (features & NETIF_F_RXCSUM)
648 read_buf |= Rx_COE_EN_;
649 else
650 read_buf &= ~Rx_COE_EN_;
651
652 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
600 check_warn_return(ret, "Failed to write COE_CR: %d\n", ret);
653 if (ret < 0) {
654 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
655 return ret;
656 }
601
602 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
603 return 0;
604}
605
606static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
607{
608 return MAX_EEPROM_SIZE;

--- 21 unchanged lines hidden (view full) ---

630 }
631
632 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
633}
634
635static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
636{
637 /* all smsc95xx registers */
657
658 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
659 return 0;
660}
661
662static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
663{
664 return MAX_EEPROM_SIZE;

--- 21 unchanged lines hidden (view full) ---

686 }
687
688 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
689}
690
691static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
692{
693 /* all smsc95xx registers */
638 return COE_CR - ID_REV + 1;
694 return COE_CR - ID_REV + sizeof(u32);
639}
640
641static void
642smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
643 void *buf)
644{
645 struct usbnet *dev = netdev_priv(netdev);
646 unsigned int i, j;

--- 25 unchanged lines hidden (view full) ---

672 wolinfo->wolopts = pdata->wolopts;
673}
674
675static int smsc95xx_ethtool_set_wol(struct net_device *net,
676 struct ethtool_wolinfo *wolinfo)
677{
678 struct usbnet *dev = netdev_priv(net);
679 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
695}
696
697static void
698smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
699 void *buf)
700{
701 struct usbnet *dev = netdev_priv(netdev);
702 unsigned int i, j;

--- 25 unchanged lines hidden (view full) ---

728 wolinfo->wolopts = pdata->wolopts;
729}
730
731static int smsc95xx_ethtool_set_wol(struct net_device *net,
732 struct ethtool_wolinfo *wolinfo)
733{
734 struct usbnet *dev = netdev_priv(net);
735 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
736 int ret;
680
681 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
737
738 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
682 return 0;
739
740 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
741 if (ret < 0)
742 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
743
744 return ret;
683}
684
685static const struct ethtool_ops smsc95xx_ethtool_ops = {
686 .get_link = usbnet_get_link,
687 .nway_reset = usbnet_nway_reset,
688 .get_drvinfo = usbnet_get_drvinfo,
689 .get_msglevel = usbnet_get_msglevel,
690 .set_msglevel = usbnet_set_msglevel,

--- 38 unchanged lines hidden (view full) ---

729static int smsc95xx_set_mac_address(struct usbnet *dev)
730{
731 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
732 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
733 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
734 int ret;
735
736 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
745}
746
747static const struct ethtool_ops smsc95xx_ethtool_ops = {
748 .get_link = usbnet_get_link,
749 .nway_reset = usbnet_nway_reset,
750 .get_drvinfo = usbnet_get_drvinfo,
751 .get_msglevel = usbnet_get_msglevel,
752 .set_msglevel = usbnet_set_msglevel,

--- 38 unchanged lines hidden (view full) ---

791static int smsc95xx_set_mac_address(struct usbnet *dev)
792{
793 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
794 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
795 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
796 int ret;
797
798 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
737 check_warn_return(ret, "Failed to write ADDRL: %d\n", ret);
799 if (ret < 0) {
800 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
801 return ret;
802 }
738
739 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
803
804 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
740 check_warn_return(ret, "Failed to write ADDRH: %d\n", ret);
805 if (ret < 0)
806 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
741
807
742 return 0;
808 return ret;
743}
744
745/* starts the TX path */
746static int smsc95xx_start_tx_path(struct usbnet *dev)
747{
748 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
749 unsigned long flags;
750 int ret;
751
752 /* Enable Tx at MAC */
753 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
754 pdata->mac_cr |= MAC_CR_TXEN_;
755 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
756
757 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
809}
810
811/* starts the TX path */
812static int smsc95xx_start_tx_path(struct usbnet *dev)
813{
814 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
815 unsigned long flags;
816 int ret;
817
818 /* Enable Tx at MAC */
819 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
820 pdata->mac_cr |= MAC_CR_TXEN_;
821 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
822
823 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
758 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
824 if (ret < 0) {
825 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
826 return ret;
827 }
759
760 /* Enable Tx at SCSRs */
761 ret = smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
828
829 /* Enable Tx at SCSRs */
830 ret = smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
762 check_warn_return(ret, "Failed to write TX_CFG: %d\n", ret);
831 if (ret < 0)
832 netdev_warn(dev->net, "Failed to write TX_CFG: %d\n", ret);
763
833
764 return 0;
834 return ret;
765}
766
767/* Starts the Receive path */
835}
836
837/* Starts the Receive path */
768static int smsc95xx_start_rx_path(struct usbnet *dev)
838static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
769{
770 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
771 unsigned long flags;
772 int ret;
773
774 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
775 pdata->mac_cr |= MAC_CR_RXEN_;
776 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
777
839{
840 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
841 unsigned long flags;
842 int ret;
843
844 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
845 pdata->mac_cr |= MAC_CR_RXEN_;
846 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
847
778 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
779 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
848 ret = __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
849 if (ret < 0)
850 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
780
851
781 return 0;
852 return ret;
782}
783
784static int smsc95xx_phy_initialize(struct usbnet *dev)
785{
786 int bmcr, ret, timeout = 0;
787
788 /* Initialize MII structure */
789 dev->mii.dev = dev->net;

--- 18 unchanged lines hidden (view full) ---

808 }
809
810 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
811 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
812 ADVERTISE_PAUSE_ASYM);
813
814 /* read to clear */
815 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
853}
854
855static int smsc95xx_phy_initialize(struct usbnet *dev)
856{
857 int bmcr, ret, timeout = 0;
858
859 /* Initialize MII structure */
860 dev->mii.dev = dev->net;

--- 18 unchanged lines hidden (view full) ---

879 }
880
881 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
882 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
883 ADVERTISE_PAUSE_ASYM);
884
885 /* read to clear */
886 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
816 check_warn_return(ret, "Failed to read PHY_INT_SRC during init");
887 if (ret < 0) {
888 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
889 return ret;
890 }
817
818 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
819 PHY_INT_MASK_DEFAULT_);
820 mii_nway_restart(&dev->mii);
821
822 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
823 return 0;
824}
825
826static int smsc95xx_reset(struct usbnet *dev)
827{
828 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
829 u32 read_buf, write_buf, burst_cap;
830 int ret = 0, timeout;
831
832 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
833
834 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
891
892 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
893 PHY_INT_MASK_DEFAULT_);
894 mii_nway_restart(&dev->mii);
895
896 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
897 return 0;
898}
899
900static int smsc95xx_reset(struct usbnet *dev)
901{
902 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
903 u32 read_buf, write_buf, burst_cap;
904 int ret = 0, timeout;
905
906 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
907
908 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
835 check_warn_return(ret, "Failed to write HW_CFG_LRST_ bit in HW_CFG\n");
909 if (ret < 0) {
910 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG\n");
911 return ret;
912 }
836
837 timeout = 0;
838 do {
839 msleep(10);
840 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
913
914 timeout = 0;
915 do {
916 msleep(10);
917 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
841 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
918 if (ret < 0) {
919 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
920 return ret;
921 }
842 timeout++;
843 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
844
845 if (timeout >= 100) {
846 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
847 return ret;
848 }
849
850 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
922 timeout++;
923 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
924
925 if (timeout >= 100) {
926 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
927 return ret;
928 }
929
930 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
851 check_warn_return(ret, "Failed to write PM_CTRL: %d\n", ret);
931 if (ret < 0) {
932 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
933 return ret;
934 }
852
853 timeout = 0;
854 do {
855 msleep(10);
856 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
935
936 timeout = 0;
937 do {
938 msleep(10);
939 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
857 check_warn_return(ret, "Failed to read PM_CTRL: %d\n", ret);
940 if (ret < 0) {
941 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
942 return ret;
943 }
858 timeout++;
859 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
860
861 if (timeout >= 100) {
862 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
863 return ret;
864 }
865
866 ret = smsc95xx_set_mac_address(dev);
867 if (ret < 0)
868 return ret;
869
944 timeout++;
945 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
946
947 if (timeout >= 100) {
948 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
949 return ret;
950 }
951
952 ret = smsc95xx_set_mac_address(dev);
953 if (ret < 0)
954 return ret;
955
870 netif_dbg(dev, ifup, dev->net,
871 "MAC Address: %pM\n", dev->net->dev_addr);
956 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
957 dev->net->dev_addr);
872
873 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
958
959 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
874 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
960 if (ret < 0) {
961 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
962 return ret;
963 }
875
964
876 netif_dbg(dev, ifup, dev->net,
877 "Read Value from HW_CFG : 0x%08x\n", read_buf);
965 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
966 read_buf);
878
879 read_buf |= HW_CFG_BIR_;
880
881 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
967
968 read_buf |= HW_CFG_BIR_;
969
970 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
882 check_warn_return(ret, "Failed to write HW_CFG_BIR_ bit in HW_CFG\n");
971 if (ret < 0) {
972 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG\n");
973 return ret;
974 }
883
884 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
975
976 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
885 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
977 if (ret < 0) {
978 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
979 return ret;
980 }
981
886 netif_dbg(dev, ifup, dev->net,
887 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
888 read_buf);
889
890 if (!turbo_mode) {
891 burst_cap = 0;
892 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
893 } else if (dev->udev->speed == USB_SPEED_HIGH) {
894 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
895 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
896 } else {
897 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
898 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
899 }
900
982 netif_dbg(dev, ifup, dev->net,
983 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
984 read_buf);
985
986 if (!turbo_mode) {
987 burst_cap = 0;
988 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
989 } else if (dev->udev->speed == USB_SPEED_HIGH) {
990 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
991 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
992 } else {
993 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
994 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
995 }
996
901 netif_dbg(dev, ifup, dev->net,
902 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
997 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
998 (ulong)dev->rx_urb_size);
903
904 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
999
1000 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
905 check_warn_return(ret, "Failed to write BURST_CAP: %d\n", ret);
1001 if (ret < 0) {
1002 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
1003 return ret;
1004 }
906
907 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
1005
1006 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
908 check_warn_return(ret, "Failed to read BURST_CAP: %d\n", ret);
1007 if (ret < 0) {
1008 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
1009 return ret;
1010 }
909
910 netif_dbg(dev, ifup, dev->net,
911 "Read Value from BURST_CAP after writing: 0x%08x\n",
912 read_buf);
913
914 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
1011
1012 netif_dbg(dev, ifup, dev->net,
1013 "Read Value from BURST_CAP after writing: 0x%08x\n",
1014 read_buf);
1015
1016 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
915 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d\n", ret);
1017 if (ret < 0) {
1018 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret);
1019 return ret;
1020 }
916
917 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
1021
1022 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
918 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d\n", ret);
1023 if (ret < 0) {
1024 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
1025 return ret;
1026 }
919
920 netif_dbg(dev, ifup, dev->net,
921 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
922 read_buf);
923
924 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
1027
1028 netif_dbg(dev, ifup, dev->net,
1029 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
1030 read_buf);
1031
1032 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
925 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
1033 if (ret < 0) {
1034 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1035 return ret;
1036 }
926
1037
927 netif_dbg(dev, ifup, dev->net,
928 "Read Value from HW_CFG: 0x%08x\n", read_buf);
1038 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
1039 read_buf);
929
930 if (turbo_mode)
931 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
932
933 read_buf &= ~HW_CFG_RXDOFF_;
934
935 /* set Rx data offset=2, Make IP header aligns on word boundary. */
936 read_buf |= NET_IP_ALIGN << 9;
937
938 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
1040
1041 if (turbo_mode)
1042 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
1043
1044 read_buf &= ~HW_CFG_RXDOFF_;
1045
1046 /* set Rx data offset=2, Make IP header aligns on word boundary. */
1047 read_buf |= NET_IP_ALIGN << 9;
1048
1049 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
939 check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
1050 if (ret < 0) {
1051 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1052 return ret;
1053 }
940
941 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
1054
1055 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
942 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
1056 if (ret < 0) {
1057 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1058 return ret;
1059 }
943
944 netif_dbg(dev, ifup, dev->net,
945 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
946
947 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
1060
1061 netif_dbg(dev, ifup, dev->net,
1062 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
1063
1064 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
948 check_warn_return(ret, "Failed to write INT_STS: %d\n", ret);
1065 if (ret < 0) {
1066 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret);
1067 return ret;
1068 }
949
950 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
1069
1070 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
951 check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
1071 if (ret < 0) {
1072 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1073 return ret;
1074 }
952 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
953
954 /* Configure GPIO pins as LED outputs */
955 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
956 LED_GPIO_CFG_FDX_LED;
957 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
1075 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
1076
1077 /* Configure GPIO pins as LED outputs */
1078 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
1079 LED_GPIO_CFG_FDX_LED;
1080 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
958 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d\n", ret);
1081 if (ret < 0) {
1082 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret);
1083 return ret;
1084 }
959
960 /* Init Tx */
961 ret = smsc95xx_write_reg(dev, FLOW, 0);
1085
1086 /* Init Tx */
1087 ret = smsc95xx_write_reg(dev, FLOW, 0);
962 check_warn_return(ret, "Failed to write FLOW: %d\n", ret);
1088 if (ret < 0) {
1089 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
1090 return ret;
1091 }
963
964 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
1092
1093 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
965 check_warn_return(ret, "Failed to write AFC_CFG: %d\n", ret);
1094 if (ret < 0) {
1095 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
1096 return ret;
1097 }
966
967 /* Don't need mac_cr_lock during initialisation */
968 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
1098
1099 /* Don't need mac_cr_lock during initialisation */
1100 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
969 check_warn_return(ret, "Failed to read MAC_CR: %d\n", ret);
1101 if (ret < 0) {
1102 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
1103 return ret;
1104 }
970
971 /* Init Rx */
972 /* Set Vlan */
973 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
1105
1106 /* Init Rx */
1107 /* Set Vlan */
1108 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
974 check_warn_return(ret, "Failed to write VLAN1: %d\n", ret);
1109 if (ret < 0) {
1110 netdev_warn(dev->net, "Failed to write VLAN1: %d\n", ret);
1111 return ret;
1112 }
975
976 /* Enable or disable checksum offload engines */
977 ret = smsc95xx_set_features(dev->net, dev->net->features);
1113
1114 /* Enable or disable checksum offload engines */
1115 ret = smsc95xx_set_features(dev->net, dev->net->features);
978 check_warn_return(ret, "Failed to set checksum offload features");
1116 if (ret < 0) {
1117 netdev_warn(dev->net, "Failed to set checksum offload features\n");
1118 return ret;
1119 }
979
980 smsc95xx_set_multicast(dev->net);
981
982 ret = smsc95xx_phy_initialize(dev);
1120
1121 smsc95xx_set_multicast(dev->net);
1122
1123 ret = smsc95xx_phy_initialize(dev);
983 check_warn_return(ret, "Failed to init PHY");
1124 if (ret < 0) {
1125 netdev_warn(dev->net, "Failed to init PHY\n");
1126 return ret;
1127 }
984
985 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
1128
1129 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
986 check_warn_return(ret, "Failed to read INT_EP_CTL: %d\n", ret);
1130 if (ret < 0) {
1131 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
1132 return ret;
1133 }
987
988 /* enable PHY interrupts */
989 read_buf |= INT_EP_CTL_PHY_INT_;
990
991 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1134
1135 /* enable PHY interrupts */
1136 read_buf |= INT_EP_CTL_PHY_INT_;
1137
1138 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
992 check_warn_return(ret, "Failed to write INT_EP_CTL: %d\n", ret);
1139 if (ret < 0) {
1140 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1141 return ret;
1142 }
993
994 ret = smsc95xx_start_tx_path(dev);
1143
1144 ret = smsc95xx_start_tx_path(dev);
995 check_warn_return(ret, "Failed to start TX path");
1145 if (ret < 0) {
1146 netdev_warn(dev->net, "Failed to start TX path\n");
1147 return ret;
1148 }
996
1149
997 ret = smsc95xx_start_rx_path(dev);
998 check_warn_return(ret, "Failed to start RX path");
1150 ret = smsc95xx_start_rx_path(dev, 0);
1151 if (ret < 0) {
1152 netdev_warn(dev->net, "Failed to start RX path\n");
1153 return ret;
1154 }
999
1000 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
1001 return 0;
1002}
1003
1004static const struct net_device_ops smsc95xx_netdev_ops = {
1005 .ndo_open = usbnet_open,
1006 .ndo_stop = usbnet_stop,

--- 5 unchanged lines hidden (view full) ---

1012 .ndo_do_ioctl = smsc95xx_ioctl,
1013 .ndo_set_rx_mode = smsc95xx_set_multicast,
1014 .ndo_set_features = smsc95xx_set_features,
1015};
1016
1017static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1018{
1019 struct smsc95xx_priv *pdata = NULL;
1155
1156 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
1157 return 0;
1158}
1159
1160static const struct net_device_ops smsc95xx_netdev_ops = {
1161 .ndo_open = usbnet_open,
1162 .ndo_stop = usbnet_stop,

--- 5 unchanged lines hidden (view full) ---

1168 .ndo_do_ioctl = smsc95xx_ioctl,
1169 .ndo_set_rx_mode = smsc95xx_set_multicast,
1170 .ndo_set_features = smsc95xx_set_features,
1171};
1172
1173static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1174{
1175 struct smsc95xx_priv *pdata = NULL;
1176 u32 val;
1020 int ret;
1021
1022 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1023
1024 ret = usbnet_get_endpoints(dev, intf);
1177 int ret;
1178
1179 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1180
1181 ret = usbnet_get_endpoints(dev, intf);
1025 check_warn_return(ret, "usbnet_get_endpoints failed: %d\n", ret);
1182 if (ret < 0) {
1183 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1184 return ret;
1185 }
1026
1027 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1028 GFP_KERNEL);
1029
1030 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1031 if (!pdata) {
1032 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
1033 return -ENOMEM;

--- 8 unchanged lines hidden (view full) ---

1042
1043 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
1044
1045 smsc95xx_init_mac_address(dev);
1046
1047 /* Init all registers */
1048 ret = smsc95xx_reset(dev);
1049
1186
1187 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1188 GFP_KERNEL);
1189
1190 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1191 if (!pdata) {
1192 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
1193 return -ENOMEM;

--- 8 unchanged lines hidden (view full) ---

1202
1203 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
1204
1205 smsc95xx_init_mac_address(dev);
1206
1207 /* Init all registers */
1208 ret = smsc95xx_reset(dev);
1209
1210 /* detect device revision as different features may be available */
1211 ret = smsc95xx_read_reg(dev, ID_REV, &val);
1212 if (ret < 0) {
1213 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1214 return ret;
1215 }
1216 val >>= 16;
1217
1218 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
1219 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
1220 pdata->features = (FEATURE_8_WAKEUP_FILTERS |
1221 FEATURE_PHY_NLP_CROSSOVER |
1222 FEATURE_AUTOSUSPEND);
1223 else if (val == ID_REV_CHIP_ID_9512_)
1224 pdata->features = FEATURE_8_WAKEUP_FILTERS;
1225
1050 dev->net->netdev_ops = &smsc95xx_netdev_ops;
1051 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1052 dev->net->flags |= IFF_MULTICAST;
1053 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
1054 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1055 return 0;
1056}
1057
1058static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1059{
1060 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1061 if (pdata) {
1062 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1063 kfree(pdata);
1064 pdata = NULL;
1065 dev->data[0] = 0;
1066 }
1067}
1068
1226 dev->net->netdev_ops = &smsc95xx_netdev_ops;
1227 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1228 dev->net->flags |= IFF_MULTICAST;
1229 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
1230 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1231 return 0;
1232}
1233
1234static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1235{
1236 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1237 if (pdata) {
1238 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1239 kfree(pdata);
1240 pdata = NULL;
1241 dev->data[0] = 0;
1242 }
1243}
1244
1245static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
1246{
1247 u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
1248 return crc << ((filter % 2) * 16);
1249}
1250
1251static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1252{
1253 struct mii_if_info *mii = &dev->mii;
1254 int ret;
1255
1256 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1257
1258 /* read to clear */
1259 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
1260 if (ret < 0) {
1261 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
1262 return ret;
1263 }
1264
1265 /* enable interrupt source */
1266 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
1267 if (ret < 0) {
1268 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n");
1269 return ret;
1270 }
1271
1272 ret |= mask;
1273
1274 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1275
1276 return 0;
1277}
1278
1279static int smsc95xx_link_ok_nopm(struct usbnet *dev)
1280{
1281 struct mii_if_info *mii = &dev->mii;
1282 int ret;
1283
1284 /* first, a dummy read, needed to latch some MII phys */
1285 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1286 if (ret < 0) {
1287 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1288 return ret;
1289 }
1290
1291 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1292 if (ret < 0) {
1293 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1294 return ret;
1295 }
1296
1297 return !!(ret & BMSR_LSTATUS);
1298}
1299
1300static int smsc95xx_enter_suspend0(struct usbnet *dev)
1301{
1302 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1303 u32 val;
1304 int ret;
1305
1306 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1307 if (ret < 0) {
1308 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1309 return ret;
1310 }
1311
1312 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1313 val |= PM_CTL_SUS_MODE_0;
1314
1315 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1316 if (ret < 0) {
1317 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1318 return ret;
1319 }
1320
1321 /* clear wol status */
1322 val &= ~PM_CTL_WUPS_;
1323 val |= PM_CTL_WUPS_WOL_;
1324
1325 /* enable energy detection */
1326 if (pdata->wolopts & WAKE_PHY)
1327 val |= PM_CTL_WUPS_ED_;
1328
1329 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1330 if (ret < 0) {
1331 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1332 return ret;
1333 }
1334
1335 /* read back PM_CTRL */
1336 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1337 if (ret < 0)
1338 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1339
1340 return ret;
1341}
1342
1343static int smsc95xx_enter_suspend1(struct usbnet *dev)
1344{
1345 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1346 struct mii_if_info *mii = &dev->mii;
1347 u32 val;
1348 int ret;
1349
1350 /* reconfigure link pulse detection timing for
1351 * compatibility with non-standard link partners
1352 */
1353 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
1354 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
1355 PHY_EDPD_CONFIG_DEFAULT);
1356
1357 /* enable energy detect power-down mode */
1358 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
1359 if (ret < 0) {
1360 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n");
1361 return ret;
1362 }
1363
1364 ret |= MODE_CTRL_STS_EDPWRDOWN_;
1365
1366 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
1367
1368 /* enter SUSPEND1 mode */
1369 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1370 if (ret < 0) {
1371 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1372 return ret;
1373 }
1374
1375 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1376 val |= PM_CTL_SUS_MODE_1;
1377
1378 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1379 if (ret < 0) {
1380 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1381 return ret;
1382 }
1383
1384 /* clear wol status, enable energy detection */
1385 val &= ~PM_CTL_WUPS_;
1386 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
1387
1388 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1389 if (ret < 0)
1390 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1391
1392 return ret;
1393}
1394
1395static int smsc95xx_enter_suspend2(struct usbnet *dev)
1396{
1397 u32 val;
1398 int ret;
1399
1400 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1401 if (ret < 0) {
1402 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1403 return ret;
1404 }
1405
1406 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1407 val |= PM_CTL_SUS_MODE_2;
1408
1409 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1410 if (ret < 0)
1411 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1412
1413 return ret;
1414}
1415
1069static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1070{
1071 struct usbnet *dev = usb_get_intfdata(intf);
1072 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1416static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1417{
1418 struct usbnet *dev = usb_get_intfdata(intf);
1419 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1420 u32 val, link_up;
1073 int ret;
1421 int ret;
1074 u32 val;
1075
1076 ret = usbnet_suspend(intf, message);
1422
1423 ret = usbnet_suspend(intf, message);
1077 check_warn_return(ret, "usbnet_suspend error");
1424 if (ret < 0) {
1425 netdev_warn(dev->net, "usbnet_suspend error\n");
1426 return ret;
1427 }
1078
1428
1079 /* if no wol options set, enter lowest power SUSPEND2 mode */
1080 if (!(pdata->wolopts & SUPPORTED_WAKE)) {
1081 netdev_info(dev->net, "entering SUSPEND2 mode");
1429 /* determine if link is up using only _nopm functions */
1430 link_up = smsc95xx_link_ok_nopm(dev);
1082
1431
1432 /* if no wol options set, or if link is down and we're not waking on
1433 * PHY activity, enter lowest power SUSPEND2 mode
1434 */
1435 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1436 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1437 netdev_info(dev->net, "entering SUSPEND2 mode\n");
1438
1083 /* disable energy detect (link up) & wake up events */
1439 /* disable energy detect (link up) & wake up events */
1084 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1085 check_warn_return(ret, "Error reading WUCSR");
1440 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1441 if (ret < 0) {
1442 netdev_warn(dev->net, "Error reading WUCSR\n");
1443 goto done;
1444 }
1086
1087 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1088
1445
1446 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1447
1089 ret = smsc95xx_write_reg(dev, WUCSR, val);
1090 check_warn_return(ret, "Error writing WUCSR");
1448 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1449 if (ret < 0) {
1450 netdev_warn(dev->net, "Error writing WUCSR\n");
1451 goto done;
1452 }
1091
1453
1092 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1093 check_warn_return(ret, "Error reading PM_CTRL");
1454 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1455 if (ret < 0) {
1456 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1457 goto done;
1458 }
1094
1095 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1096
1459
1460 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1461
1097 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1098 check_warn_return(ret, "Error writing PM_CTRL");
1462 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1463 if (ret < 0) {
1464 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1465 goto done;
1466 }
1099
1467
1100 /* enter suspend2 mode */
1101 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1102 check_warn_return(ret, "Error reading PM_CTRL");
1468 ret = smsc95xx_enter_suspend2(dev);
1469 goto done;
1470 }
1103
1471
1104 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1105 val |= PM_CTL_SUS_MODE_2;
1472 if (pdata->wolopts & WAKE_PHY) {
1473 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1474 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
1475 if (ret < 0) {
1476 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1477 goto done;
1478 }
1106
1479
1107 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1108 check_warn_return(ret, "Error writing PM_CTRL");
1480 /* if link is down then configure EDPD and enter SUSPEND1,
1481 * otherwise enter SUSPEND0 below
1482 */
1483 if (!link_up) {
1484 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1485 ret = smsc95xx_enter_suspend1(dev);
1486 goto done;
1487 }
1488 }
1109
1489
1110 return 0;
1490 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1491 u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL);
1492 u32 command[2];
1493 u32 offset[2];
1494 u32 crc[4];
1495 int wuff_filter_count =
1496 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
1497 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
1498 int i, filter = 0;
1499
1500 if (!filter_mask) {
1501 netdev_warn(dev->net, "Unable to allocate filter_mask\n");
1502 ret = -ENOMEM;
1503 goto done;
1504 }
1505
1506 memset(command, 0, sizeof(command));
1507 memset(offset, 0, sizeof(offset));
1508 memset(crc, 0, sizeof(crc));
1509
1510 if (pdata->wolopts & WAKE_BCAST) {
1511 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1512 netdev_info(dev->net, "enabling broadcast detection\n");
1513 filter_mask[filter * 4] = 0x003F;
1514 filter_mask[filter * 4 + 1] = 0x00;
1515 filter_mask[filter * 4 + 2] = 0x00;
1516 filter_mask[filter * 4 + 3] = 0x00;
1517 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1518 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1519 crc[filter/2] |= smsc_crc(bcast, 6, filter);
1520 filter++;
1521 }
1522
1523 if (pdata->wolopts & WAKE_MCAST) {
1524 const u8 mcast[] = {0x01, 0x00, 0x5E};
1525 netdev_info(dev->net, "enabling multicast detection\n");
1526 filter_mask[filter * 4] = 0x0007;
1527 filter_mask[filter * 4 + 1] = 0x00;
1528 filter_mask[filter * 4 + 2] = 0x00;
1529 filter_mask[filter * 4 + 3] = 0x00;
1530 command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1531 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1532 crc[filter/2] |= smsc_crc(mcast, 3, filter);
1533 filter++;
1534 }
1535
1536 if (pdata->wolopts & WAKE_ARP) {
1537 const u8 arp[] = {0x08, 0x06};
1538 netdev_info(dev->net, "enabling ARP detection\n");
1539 filter_mask[filter * 4] = 0x0003;
1540 filter_mask[filter * 4 + 1] = 0x00;
1541 filter_mask[filter * 4 + 2] = 0x00;
1542 filter_mask[filter * 4 + 3] = 0x00;
1543 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1544 offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1545 crc[filter/2] |= smsc_crc(arp, 2, filter);
1546 filter++;
1547 }
1548
1549 if (pdata->wolopts & WAKE_UCAST) {
1550 netdev_info(dev->net, "enabling unicast detection\n");
1551 filter_mask[filter * 4] = 0x003F;
1552 filter_mask[filter * 4 + 1] = 0x00;
1553 filter_mask[filter * 4 + 2] = 0x00;
1554 filter_mask[filter * 4 + 3] = 0x00;
1555 command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1556 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1557 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1558 filter++;
1559 }
1560
1561 for (i = 0; i < (wuff_filter_count * 4); i++) {
1562 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
1563 if (ret < 0) {
1564 netdev_warn(dev->net, "Error writing WUFF\n");
1565 kfree(filter_mask);
1566 goto done;
1567 }
1568 }
1569 kfree(filter_mask);
1570
1571 for (i = 0; i < (wuff_filter_count / 4); i++) {
1572 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
1573 if (ret < 0) {
1574 netdev_warn(dev->net, "Error writing WUFF\n");
1575 goto done;
1576 }
1577 }
1578
1579 for (i = 0; i < (wuff_filter_count / 4); i++) {
1580 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
1581 if (ret < 0) {
1582 netdev_warn(dev->net, "Error writing WUFF\n");
1583 goto done;
1584 }
1585 }
1586
1587 for (i = 0; i < (wuff_filter_count / 2); i++) {
1588 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
1589 if (ret < 0) {
1590 netdev_warn(dev->net, "Error writing WUFF\n");
1591 goto done;
1592 }
1593 }
1594
1595 /* clear any pending pattern match packet status */
1596 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1597 if (ret < 0) {
1598 netdev_warn(dev->net, "Error reading WUCSR\n");
1599 goto done;
1600 }
1601
1602 val |= WUCSR_WUFR_;
1603
1604 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1605 if (ret < 0) {
1606 netdev_warn(dev->net, "Error writing WUCSR\n");
1607 goto done;
1608 }
1111 }
1112
1113 if (pdata->wolopts & WAKE_MAGIC) {
1114 /* clear any pending magic packet status */
1609 }
1610
1611 if (pdata->wolopts & WAKE_MAGIC) {
1612 /* clear any pending magic packet status */
1115 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1116 check_warn_return(ret, "Error reading WUCSR");
1613 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1614 if (ret < 0) {
1615 netdev_warn(dev->net, "Error reading WUCSR\n");
1616 goto done;
1617 }
1117
1118 val |= WUCSR_MPR_;
1119
1618
1619 val |= WUCSR_MPR_;
1620
1120 ret = smsc95xx_write_reg(dev, WUCSR, val);
1121 check_warn_return(ret, "Error writing WUCSR");
1621 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1622 if (ret < 0) {
1623 netdev_warn(dev->net, "Error writing WUCSR\n");
1624 goto done;
1625 }
1122 }
1123
1626 }
1627
1124 /* enable/disable magic packup wake */
1125 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1126 check_warn_return(ret, "Error reading WUCSR");
1628 /* enable/disable wakeup sources */
1629 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1630 if (ret < 0) {
1631 netdev_warn(dev->net, "Error reading WUCSR\n");
1632 goto done;
1633 }
1127
1634
1635 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1636 netdev_info(dev->net, "enabling pattern match wakeup\n");
1637 val |= WUCSR_WAKE_EN_;
1638 } else {
1639 netdev_info(dev->net, "disabling pattern match wakeup\n");
1640 val &= ~WUCSR_WAKE_EN_;
1641 }
1642
1128 if (pdata->wolopts & WAKE_MAGIC) {
1643 if (pdata->wolopts & WAKE_MAGIC) {
1129 netdev_info(dev->net, "enabling magic packet wakeup");
1644 netdev_info(dev->net, "enabling magic packet wakeup\n");
1130 val |= WUCSR_MPEN_;
1131 } else {
1645 val |= WUCSR_MPEN_;
1646 } else {
1132 netdev_info(dev->net, "disabling magic packet wakeup");
1647 netdev_info(dev->net, "disabling magic packet wakeup\n");
1133 val &= ~WUCSR_MPEN_;
1134 }
1135
1648 val &= ~WUCSR_MPEN_;
1649 }
1650
1136 ret = smsc95xx_write_reg(dev, WUCSR, val);
1137 check_warn_return(ret, "Error writing WUCSR");
1651 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1652 if (ret < 0) {
1653 netdev_warn(dev->net, "Error writing WUCSR\n");
1654 goto done;
1655 }
1138
1139 /* enable wol wakeup source */
1656
1657 /* enable wol wakeup source */
1140 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1141 check_warn_return(ret, "Error reading PM_CTRL");
1658 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1659 if (ret < 0) {
1660 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1661 goto done;
1662 }
1142
1143 val |= PM_CTL_WOL_EN_;
1144
1663
1664 val |= PM_CTL_WOL_EN_;
1665
1145 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1146 check_warn_return(ret, "Error writing PM_CTRL");
1666 /* phy energy detect wakeup source */
1667 if (pdata->wolopts & WAKE_PHY)
1668 val |= PM_CTL_ED_EN_;
1147
1669
1148 /* enable receiver */
1149 smsc95xx_start_rx_path(dev);
1670 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1671 if (ret < 0) {
1672 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1673 goto done;
1674 }
1150
1675
1676 /* enable receiver to enable frame reception */
1677 smsc95xx_start_rx_path(dev, 1);
1678
1151 /* some wol options are enabled, so enter SUSPEND0 */
1679 /* some wol options are enabled, so enter SUSPEND0 */
1152 netdev_info(dev->net, "entering SUSPEND0 mode");
1680 netdev_info(dev->net, "entering SUSPEND0 mode\n");
1681 ret = smsc95xx_enter_suspend0(dev);
1153
1682
1154 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1155 check_warn_return(ret, "Error reading PM_CTRL");
1156
1157 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1158 val |= PM_CTL_SUS_MODE_0;
1159
1160 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1161 check_warn_return(ret, "Error writing PM_CTRL");
1162
1163 /* clear wol status */
1164 val &= ~PM_CTL_WUPS_;
1165 val |= PM_CTL_WUPS_WOL_;
1166 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1167 check_warn_return(ret, "Error writing PM_CTRL");
1168
1169 /* read back PM_CTRL */
1170 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1171 check_warn_return(ret, "Error reading PM_CTRL");
1172
1173 smsc95xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1174
1175 return 0;
1683done:
1684 if (ret)
1685 usbnet_resume(intf);
1686 return ret;
1176}
1177
1178static int smsc95xx_resume(struct usb_interface *intf)
1179{
1180 struct usbnet *dev = usb_get_intfdata(intf);
1181 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1182 int ret;
1183 u32 val;
1184
1185 BUG_ON(!dev);
1186
1687}
1688
1689static int smsc95xx_resume(struct usb_interface *intf)
1690{
1691 struct usbnet *dev = usb_get_intfdata(intf);
1692 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1693 int ret;
1694 u32 val;
1695
1696 BUG_ON(!dev);
1697
1187 if (pdata->wolopts & WAKE_MAGIC) {
1188 smsc95xx_clear_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1698 if (pdata->wolopts) {
1699 /* clear wake-up sources */
1700 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
1701 if (ret < 0) {
1702 netdev_warn(dev->net, "Error reading WUCSR\n");
1703 return ret;
1704 }
1189
1705
1190 /* Disable magic packup wake */
1191 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1192 check_warn_return(ret, "Error reading WUCSR");
1706 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
1193
1707
1194 val &= ~WUCSR_MPEN_;
1708 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
1709 if (ret < 0) {
1710 netdev_warn(dev->net, "Error writing WUCSR\n");
1711 return ret;
1712 }
1195
1713
1196 ret = smsc95xx_write_reg(dev, WUCSR, val);
1197 check_warn_return(ret, "Error writing WUCSR");
1198
1199 /* clear wake-up status */
1714 /* clear wake-up status */
1200 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1201 check_warn_return(ret, "Error reading PM_CTRL");
1715 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1716 if (ret < 0) {
1717 netdev_warn(dev->net, "Error reading PM_CTRL\n");
1718 return ret;
1719 }
1202
1203 val &= ~PM_CTL_WOL_EN_;
1204 val |= PM_CTL_WUPS_;
1205
1720
1721 val &= ~PM_CTL_WOL_EN_;
1722 val |= PM_CTL_WUPS_;
1723
1206 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1207 check_warn_return(ret, "Error writing PM_CTRL");
1724 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1725 if (ret < 0) {
1726 netdev_warn(dev->net, "Error writing PM_CTRL\n");
1727 return ret;
1728 }
1208 }
1209
1729 }
1730
1210 return usbnet_resume(intf);
1211 check_warn_return(ret, "usbnet_resume error");
1731 ret = usbnet_resume(intf);
1732 if (ret < 0)
1733 netdev_warn(dev->net, "usbnet_resume error\n");
1212
1734
1213 return 0;
1735 return ret;
1214}
1215
1216static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1217{
1218 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1219 skb->ip_summed = CHECKSUM_COMPLETE;
1220 skb_trim(skb, skb->len - 2);
1221}

--- 270 unchanged lines hidden --- 		1736}
1737
1738static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1739{
1740 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1741 skb->ip_summed = CHECKSUM_COMPLETE;
1742 skb_trim(skb, skb->len - 2);
1743}

--- 270 unchanged lines hidden ---