national.c (2d8ad8719591fa803b0d589ed057fa46f49b7155) national.c (6e6f400f5381e08dc80e1b5a37ed02a081c179d9)
1/*
2 * drivers/net/phy/national.c
3 *
4 * Driver for National Semiconductor PHYs
5 *
6 * Author: Stuart Menefy <stuart.menefy@st.com>
7 * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
8 *

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20#include <linux/mii.h>
21#include <linux/ethtool.h>
22#include <linux/phy.h>
23#include <linux/netdevice.h>
24
25/* DP83865 phy identifier values */
26#define DP83865_PHY_ID 0x20005c7a
27
1/*
2 * drivers/net/phy/national.c
3 *
4 * Driver for National Semiconductor PHYs
5 *
6 * Author: Stuart Menefy <stuart.menefy@st.com>
7 * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
8 *

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20#include <linux/mii.h>
21#include <linux/ethtool.h>
22#include <linux/phy.h>
23#include <linux/netdevice.h>
24
25/* DP83865 phy identifier values */
26#define DP83865_PHY_ID 0x20005c7a
27
28#define DP83865_INT_MASK_REG 0x15
29#define DP83865_INT_MASK_STATUS 0x14
28#define DP83865_INT_STATUS 0x14
29#define DP83865_INT_MASK 0x15
30#define DP83865_INT_CLEAR 0x17
30
31#define DP83865_INT_REMOTE_FAULT 0x0008
32#define DP83865_INT_ANE_COMPLETED 0x0010
33#define DP83865_INT_LINK_CHANGE 0xe000
34#define DP83865_INT_MASK_DEFAULT (DP83865_INT_REMOTE_FAULT | \
35 DP83865_INT_ANE_COMPLETED | \
36 DP83865_INT_LINK_CHANGE)
37

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63 phy_write(phydev, NS_EXP_MEM_DATA, data);
64}
65
66static int ns_config_intr(struct phy_device *phydev)
67{
68 int err;
69
70 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
31
32#define DP83865_INT_REMOTE_FAULT 0x0008
33#define DP83865_INT_ANE_COMPLETED 0x0010
34#define DP83865_INT_LINK_CHANGE 0xe000
35#define DP83865_INT_MASK_DEFAULT (DP83865_INT_REMOTE_FAULT | \
36 DP83865_INT_ANE_COMPLETED | \
37 DP83865_INT_LINK_CHANGE)
38

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64 phy_write(phydev, NS_EXP_MEM_DATA, data);
65}
66
67static int ns_config_intr(struct phy_device *phydev)
68{
69 int err;
70
71 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
71 err = phy_write(phydev, DP83865_INT_MASK_REG,
72 err = phy_write(phydev, DP83865_INT_MASK,
72 DP83865_INT_MASK_DEFAULT);
73 else
73 DP83865_INT_MASK_DEFAULT);
74 else
74 err = phy_write(phydev, DP83865_INT_MASK_REG, 0);
75 err = phy_write(phydev, DP83865_INT_MASK, 0);
75
76 return err;
77}
78
79static int ns_ack_interrupt(struct phy_device *phydev)
80{
76
77 return err;
78}
79
80static int ns_ack_interrupt(struct phy_device *phydev)
81{
81 int ret = phy_read(phydev, DP83865_INT_MASK_STATUS);
82 int ret = phy_read(phydev, DP83865_INT_STATUS);
82 if (ret < 0)
83 return ret;
84
83 if (ret < 0)
84 return ret;
85
85 return 0;
86 /* Clear the interrupt status bit by writing a “1”
87 * to the corresponding bit in INT_CLEAR (2:0 are reserved) */
88 ret = phy_write(phydev, DP83865_INT_CLEAR, ret & ~0x7);
89
90 return ret;
86}
87
88static void ns_giga_speed_fallback(struct phy_device *phydev, int mode)
89{
90 int bmcr = phy_read(phydev, MII_BMCR);
91
92 phy_write(phydev, MII_BMCR, (bmcr | BMCR_PDOWN));
93

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92
93static void ns_giga_speed_fallback(struct phy_device *phydev, int mode)
94{
95 int bmcr = phy_read(phydev, MII_BMCR);
96
97 phy_write(phydev, MII_BMCR, (bmcr | BMCR_PDOWN));
98

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