ocelot.c (ffb1e76f4f32d2b8ea4189df0484980370476395) ocelot.c (acc64f52afac15e9e44d9b5253271346841786e0)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi Ocelot Switch driver
4 *
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7#include <linux/dsa/ocelot.h>
8#include <linux/if_bridge.h>

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558 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, tx_pause);
559
560 /* Undo the effects of ocelot_phylink_mac_link_down:
561 * enable MAC module
562 */
563 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
564 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
565
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi Ocelot Switch driver
4 *
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7#include <linux/dsa/ocelot.h>
8#include <linux/if_bridge.h>

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558 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, tx_pause);
559
560 /* Undo the effects of ocelot_phylink_mac_link_down:
561 * enable MAC module
562 */
563 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
564 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
565
566 /* Take MAC, Port, Phy (intern) and PCS (SGMII/Serdes) clock out of
567 * reset
568 */
569 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(speed),
570 DEV_CLOCK_CFG);
571
572 /* No PFC */
573 ocelot_write_gix(ocelot, ANA_PFC_PFC_CFG_FC_LINK_SPEED(speed),
574 ANA_PFC_PFC_CFG, port);
575
576 /* Core: Enable port for frame transfer */
577 ocelot_fields_write(ocelot, port,
578 QSYS_SWITCH_PORT_MODE_PORT_ENA, 1);
579}
580EXPORT_SYMBOL_GPL(ocelot_phylink_mac_link_up);
581
582static void ocelot_port_add_txtstamp_skb(struct ocelot *ocelot, int port,
583 struct sk_buff *clone)

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1298
1299 mask |= BIT(port);
1300 }
1301 }
1302
1303 return mask;
1304}
1305
566 /* Core: Enable port for frame transfer */
567 ocelot_fields_write(ocelot, port,
568 QSYS_SWITCH_PORT_MODE_PORT_ENA, 1);
569}
570EXPORT_SYMBOL_GPL(ocelot_phylink_mac_link_up);
571
572static void ocelot_port_add_txtstamp_skb(struct ocelot *ocelot, int port,
573 struct sk_buff *clone)

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1288
1289 mask |= BIT(port);
1290 }
1291 }
1292
1293 return mask;
1294}
1295
1306static u32 ocelot_get_bridge_fwd_mask(struct ocelot *ocelot,
1296static u32 ocelot_get_bridge_fwd_mask(struct ocelot *ocelot, int src_port,
1307 struct net_device *bridge)
1308{
1297 struct net_device *bridge)
1298{
1299 struct ocelot_port *ocelot_port = ocelot->ports[src_port];
1309 u32 mask = 0;
1310 int port;
1311
1300 u32 mask = 0;
1301 int port;
1302
1303 if (!ocelot_port || ocelot_port->bridge != bridge ||
1304 ocelot_port->stp_state != BR_STATE_FORWARDING)
1305 return 0;
1306
1312 for (port = 0; port < ocelot->num_phys_ports; port++) {
1307 for (port = 0; port < ocelot->num_phys_ports; port++) {
1313 struct ocelot_port *ocelot_port = ocelot->ports[port];
1308 ocelot_port = ocelot->ports[port];
1314
1315 if (!ocelot_port)
1316 continue;
1317
1318 if (ocelot_port->stp_state == BR_STATE_FORWARDING &&
1319 ocelot_port->bridge == bridge)
1320 mask |= BIT(port);
1321 }

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1371 * themselves
1372 */
1373 mask = GENMASK(ocelot->num_phys_ports - 1, 0);
1374 mask &= ~cpu_fwd_mask;
1375 } else if (ocelot_port->bridge) {
1376 struct net_device *bridge = ocelot_port->bridge;
1377 struct net_device *bond = ocelot_port->bond;
1378
1309
1310 if (!ocelot_port)
1311 continue;
1312
1313 if (ocelot_port->stp_state == BR_STATE_FORWARDING &&
1314 ocelot_port->bridge == bridge)
1315 mask |= BIT(port);
1316 }

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1366 * themselves
1367 */
1368 mask = GENMASK(ocelot->num_phys_ports - 1, 0);
1369 mask &= ~cpu_fwd_mask;
1370 } else if (ocelot_port->bridge) {
1371 struct net_device *bridge = ocelot_port->bridge;
1372 struct net_device *bond = ocelot_port->bond;
1373
1379 mask = ocelot_get_bridge_fwd_mask(ocelot, bridge);
1374 mask = ocelot_get_bridge_fwd_mask(ocelot, port, bridge);
1380 mask |= cpu_fwd_mask;
1381 mask &= ~BIT(port);
1382 if (bond) {
1383 mask &= ~ocelot_get_bond_mask(ocelot, bond,
1384 false);
1385 }
1386 } else {
1387 /* Standalone ports forward only to DSA tag_8021q CPU

--- 843 unchanged lines hidden --- 		1375 mask |= cpu_fwd_mask;
1376 mask &= ~BIT(port);
1377 if (bond) {
1378 mask &= ~ocelot_get_bond_mask(ocelot, bond,
1379 false);
1380 }
1381 } else {
1382 /* Standalone ports forward only to DSA tag_8021q CPU

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