ocelot.c (f79c20c81723221b9c12d41d8d50c3fa93fbe791) ocelot.c (b80af659699d212cf8cec6593f6551905c4ae86f)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi Ocelot Switch driver
4 *
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7#include <linux/if_bridge.h>
8#include <soc/mscc/ocelot_vcap.h>

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884 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON) |
885 BIT(HWTSTAMP_TX_ONESTEP_SYNC);
886 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL);
887
888 return 0;
889}
890EXPORT_SYMBOL(ocelot_get_ts_info);
891
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi Ocelot Switch driver
4 *
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7#include <linux/if_bridge.h>
8#include <soc/mscc/ocelot_vcap.h>

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884 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON) |
885 BIT(HWTSTAMP_TX_ONESTEP_SYNC);
886 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL);
887
888 return 0;
889}
890EXPORT_SYMBOL(ocelot_get_ts_info);
891
892static u32 ocelot_get_bond_mask(struct ocelot *ocelot, struct net_device *bond)
893{
894 u32 mask = 0;
895 int port;
896
897 for (port = 0; port < ocelot->num_phys_ports; port++) {
898 struct ocelot_port *ocelot_port = ocelot->ports[port];
899
900 if (!ocelot_port)
901 continue;
902
903 if (ocelot_port->bond == bond)
904 mask |= BIT(port);
905 }
906
907 return mask;
908}
909
892static u32 ocelot_get_dsa_8021q_cpu_mask(struct ocelot *ocelot)
893{
894 u32 mask = 0;
895 int port;
896
897 for (port = 0; port < ocelot->num_phys_ports; port++) {
898 struct ocelot_port *ocelot_port = ocelot->ports[port];
899

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1314 ANA_PORT_PORT_CFG, p);
1315 }
1316}
1317
1318int ocelot_port_lag_join(struct ocelot *ocelot, int port,
1319 struct net_device *bond,
1320 struct netdev_lag_upper_info *info)
1321{
910static u32 ocelot_get_dsa_8021q_cpu_mask(struct ocelot *ocelot)
911{
912 u32 mask = 0;
913 int port;
914
915 for (port = 0; port < ocelot->num_phys_ports; port++) {
916 struct ocelot_port *ocelot_port = ocelot->ports[port];
917

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1332 ANA_PORT_PORT_CFG, p);
1333 }
1334}
1335
1336int ocelot_port_lag_join(struct ocelot *ocelot, int port,
1337 struct net_device *bond,
1338 struct netdev_lag_upper_info *info)
1339{
1322 struct net_device *ndev;
1323 u32 bond_mask = 0;
1324 int lag, lp;
1325
1326 if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
1327 return -EOPNOTSUPP;
1328
1340 u32 bond_mask = 0;
1341 int lag, lp;
1342
1343 if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
1344 return -EOPNOTSUPP;
1345
1329 rcu_read_lock();
1330 for_each_netdev_in_bond_rcu(bond, ndev) {
1331 struct ocelot_port_private *priv = netdev_priv(ndev);
1346 ocelot->ports[port]->bond = bond;
1332
1347
1333 bond_mask |= BIT(priv->chip_port);
1334 }
1335 rcu_read_unlock();
1348 bond_mask = ocelot_get_bond_mask(ocelot, bond);
1336
1337 lp = __ffs(bond_mask);
1338
1339 /* If the new port is the lowest one, use it as the logical port from
1340 * now on
1341 */
1342 if (port == lp) {
1343 lag = port;

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1361EXPORT_SYMBOL(ocelot_port_lag_join);
1362
1363void ocelot_port_lag_leave(struct ocelot *ocelot, int port,
1364 struct net_device *bond)
1365{
1366 u32 port_cfg;
1367 int i;
1368
1349
1350 lp = __ffs(bond_mask);
1351
1352 /* If the new port is the lowest one, use it as the logical port from
1353 * now on
1354 */
1355 if (port == lp) {
1356 lag = port;

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1374EXPORT_SYMBOL(ocelot_port_lag_join);
1375
1376void ocelot_port_lag_leave(struct ocelot *ocelot, int port,
1377 struct net_device *bond)
1378{
1379 u32 port_cfg;
1380 int i;
1381
1382 ocelot->ports[port]->bond = NULL;
1383
1369 /* Remove port from any lag */
1370 for (i = 0; i < ocelot->num_phys_ports; i++)
1371 ocelot->lags[i] &= ~BIT(port);
1372
1373 /* if it was the logical port of the lag, move the lag config to the
1374 * next port
1375 */
1376 if (ocelot->lags[port]) {

--- 343 unchanged lines hidden --- 		1384 /* Remove port from any lag */
1385 for (i = 0; i < ocelot->num_phys_ports; i++)
1386 ocelot->lags[i] &= ~BIT(port);
1387
1388 /* if it was the logical port of the lag, move the lag config to the
1389 * next port
1390 */
1391 if (ocelot->lags[port]) {

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