ocelot.c (268603d79cc48dba671e9caf108fab32315b86a2) ocelot.c (36a0bf44358597dee6947938e8643c61442cab87)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi Ocelot Switch driver
4 *
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7#include <linux/dsa/ocelot.h>
8#include <linux/if_bridge.h>

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2209 }
2210
2211 if (!pgid_cpu)
2212 pgid_cpu = BIT(ocelot->num_phys_ports);
2213
2214 ocelot_write_rix(ocelot, pgid_cpu, ANA_PGID_PGID, PGID_CPU);
2215}
2216
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi Ocelot Switch driver
4 *
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7#include <linux/dsa/ocelot.h>
8#include <linux/if_bridge.h>

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2209 }
2210
2211 if (!pgid_cpu)
2212 pgid_cpu = BIT(ocelot->num_phys_ports);
2213
2214 ocelot_write_rix(ocelot, pgid_cpu, ANA_PGID_PGID, PGID_CPU);
2215}
2216
2217void ocelot_port_assign_dsa_8021q_cpu(struct ocelot *ocelot, int port,
2218 int cpu)
2217void ocelot_port_setup_dsa_8021q_cpu(struct ocelot *ocelot, int cpu)
2219{
2220 struct ocelot_port *cpu_port = ocelot->ports[cpu];
2221 u16 vid;
2222
2223 mutex_lock(&ocelot->fwd_domain_lock);
2224
2218{
2219 struct ocelot_port *cpu_port = ocelot->ports[cpu];
2220 u16 vid;
2221
2222 mutex_lock(&ocelot->fwd_domain_lock);
2223
2225 ocelot->ports[port]->dsa_8021q_cpu = cpu_port;
2224 cpu_port->is_dsa_8021q_cpu = true;
2226
2225
2227 if (!cpu_port->is_dsa_8021q_cpu) {
2228 cpu_port->is_dsa_8021q_cpu = true;
2226 for (vid = OCELOT_RSV_VLAN_RANGE_START; vid < VLAN_N_VID; vid++)
2227 ocelot_vlan_member_add(ocelot, cpu, vid, true);
2229
2228
2230 for (vid = OCELOT_RSV_VLAN_RANGE_START; vid < VLAN_N_VID; vid++)
2231 ocelot_vlan_member_add(ocelot, cpu, vid, true);
2229 ocelot_update_pgid_cpu(ocelot);
2232
2230
2233 ocelot_update_pgid_cpu(ocelot);
2234 }
2235
2236 ocelot_apply_bridge_fwd_mask(ocelot, true);
2237
2238 mutex_unlock(&ocelot->fwd_domain_lock);
2239}
2231 mutex_unlock(&ocelot->fwd_domain_lock);
2232}
2240EXPORT_SYMBOL_GPL(ocelot_port_assign_dsa_8021q_cpu);
2233EXPORT_SYMBOL_GPL(ocelot_port_setup_dsa_8021q_cpu);
2241
2234
2242void ocelot_port_unassign_dsa_8021q_cpu(struct ocelot *ocelot, int port)
2235void ocelot_port_teardown_dsa_8021q_cpu(struct ocelot *ocelot, int cpu)
2243{
2236{
2244 struct ocelot_port *cpu_port = ocelot->ports[port]->dsa_8021q_cpu;
2245 bool keep = false;
2237 struct ocelot_port *cpu_port = ocelot->ports[cpu];
2246 u16 vid;
2238 u16 vid;
2247 int p;
2248
2249 mutex_lock(&ocelot->fwd_domain_lock);
2250
2239
2240 mutex_lock(&ocelot->fwd_domain_lock);
2241
2251 ocelot->ports[port]->dsa_8021q_cpu = NULL;
2242 cpu_port->is_dsa_8021q_cpu = false;
2252
2243
2253 for (p = 0; p < ocelot->num_phys_ports; p++) {
2254 if (!ocelot->ports[p])
2255 continue;
2244 for (vid = OCELOT_RSV_VLAN_RANGE_START; vid < VLAN_N_VID; vid++)
2245 ocelot_vlan_member_del(ocelot, cpu_port->index, vid);
2256
2246
2257 if (ocelot->ports[p]->dsa_8021q_cpu == cpu_port) {
2258 keep = true;
2259 break;
2260 }
2261 }
2247 ocelot_update_pgid_cpu(ocelot);
2262
2248
2263 if (!keep) {
2264 cpu_port->is_dsa_8021q_cpu = false;
2249 mutex_unlock(&ocelot->fwd_domain_lock);
2250}
2251EXPORT_SYMBOL_GPL(ocelot_port_teardown_dsa_8021q_cpu);
2265
2252
2266 for (vid = OCELOT_RSV_VLAN_RANGE_START; vid < VLAN_N_VID; vid++)
2267 ocelot_vlan_member_del(ocelot, cpu_port->index, vid);
2253void ocelot_port_assign_dsa_8021q_cpu(struct ocelot *ocelot, int port,
2254 int cpu)
2255{
2256 struct ocelot_port *cpu_port = ocelot->ports[cpu];
2268
2257
2269 ocelot_update_pgid_cpu(ocelot);
2270 }
2258 mutex_lock(&ocelot->fwd_domain_lock);
2271
2259
2260 ocelot->ports[port]->dsa_8021q_cpu = cpu_port;
2272 ocelot_apply_bridge_fwd_mask(ocelot, true);
2273
2274 mutex_unlock(&ocelot->fwd_domain_lock);
2275}
2261 ocelot_apply_bridge_fwd_mask(ocelot, true);
2262
2263 mutex_unlock(&ocelot->fwd_domain_lock);
2264}
2265EXPORT_SYMBOL_GPL(ocelot_port_assign_dsa_8021q_cpu);
2266
2267void ocelot_port_unassign_dsa_8021q_cpu(struct ocelot *ocelot, int port)
2268{
2269 mutex_lock(&ocelot->fwd_domain_lock);
2270
2271 ocelot->ports[port]->dsa_8021q_cpu = NULL;
2272 ocelot_apply_bridge_fwd_mask(ocelot, true);
2273
2274 mutex_unlock(&ocelot->fwd_domain_lock);
2275}
2276EXPORT_SYMBOL_GPL(ocelot_port_unassign_dsa_8021q_cpu);
2277
2278void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, u8 state)
2279{
2280 struct ocelot_port *ocelot_port = ocelot->ports[port];
2281 u32 learn_ena = 0;
2282
2283 mutex_lock(&ocelot->fwd_domain_lock);

--- 1255 unchanged lines hidden --- 		2276EXPORT_SYMBOL_GPL(ocelot_port_unassign_dsa_8021q_cpu);
2277
2278void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, u8 state)
2279{
2280 struct ocelot_port *ocelot_port = ocelot->ports[port];
2281 u32 learn_ena = 0;
2282
2283 mutex_lock(&ocelot->fwd_domain_lock);

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