ice.h (2491b544ff3aa9717d427033206fa793be53429d) ice.h (1aec6e1b0886569c5c6e92d6d5fc25e6779e7f23)
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018, Intel Corporation. */
3
4#ifndef _ICE_H_
5#define _ICE_H_
6
7#include <linux/types.h>
8#include <linux/errno.h>

--- 32 unchanged lines hidden (view full) ---

41#include "ice_virtchnl_pf.h"
42#include "ice_sriov.h"
43
44extern const char ice_drv_ver[];
45#define ICE_BAR0 0
46#define ICE_REQ_DESC_MULTIPLE 32
47#define ICE_MIN_NUM_DESC ICE_REQ_DESC_MULTIPLE
48#define ICE_MAX_NUM_DESC 8160
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018, Intel Corporation. */
3
4#ifndef _ICE_H_
5#define _ICE_H_
6
7#include <linux/types.h>
8#include <linux/errno.h>

--- 32 unchanged lines hidden (view full) ---

41#include "ice_virtchnl_pf.h"
42#include "ice_sriov.h"
43
44extern const char ice_drv_ver[];
45#define ICE_BAR0 0
46#define ICE_REQ_DESC_MULTIPLE 32
47#define ICE_MIN_NUM_DESC ICE_REQ_DESC_MULTIPLE
48#define ICE_MAX_NUM_DESC 8160
49/* set default number of Rx/Tx descriptors to the minimum between
50 * ICE_MAX_NUM_DESC and the number of descriptors to fill up an entire page
49#define ICE_DFLT_MIN_RX_DESC 512
50/* if the default number of Rx descriptors between ICE_MAX_NUM_DESC and the
51 * number of descriptors to fill up an entire page is greater than or equal to
52 * ICE_DFLT_MIN_RX_DESC set it based on page size, otherwise set it to
53 * ICE_DFLT_MIN_RX_DESC
51 */
54 */
52#define ICE_DFLT_NUM_RX_DESC min_t(u16, ICE_MAX_NUM_DESC, \
53 ALIGN(PAGE_SIZE / \
54 sizeof(union ice_32byte_rx_desc), \
55 ICE_REQ_DESC_MULTIPLE))
55#define ICE_DFLT_NUM_RX_DESC \
56 min_t(u16, ICE_MAX_NUM_DESC, \
57 max_t(u16, ALIGN(PAGE_SIZE / sizeof(union ice_32byte_rx_desc), \
58 ICE_REQ_DESC_MULTIPLE), \
59 ICE_DFLT_MIN_RX_DESC))
60/* set default number of Tx descriptors to the minimum between ICE_MAX_NUM_DESC
61 * and the number of descriptors to fill up an entire page
62 */
56#define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \
57 ALIGN(PAGE_SIZE / \
58 sizeof(struct ice_tx_desc), \
59 ICE_REQ_DESC_MULTIPLE))
60
61#define ICE_DFLT_TRAFFIC_CLASS BIT(0)
62#define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
63#define ICE_ETHTOOL_FWVER_LEN 32

--- 208 unchanged lines hidden (view full) ---

272 /* VSI stats */
273 struct rtnl_link_stats64 net_stats;
274 struct ice_eth_stats eth_stats;
275 struct ice_eth_stats eth_stats_prev;
276
277 struct list_head tmp_sync_list; /* MAC filters to be synced */
278 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
279
63#define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \
64 ALIGN(PAGE_SIZE / \
65 sizeof(struct ice_tx_desc), \
66 ICE_REQ_DESC_MULTIPLE))
67
68#define ICE_DFLT_TRAFFIC_CLASS BIT(0)
69#define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
70#define ICE_ETHTOOL_FWVER_LEN 32

--- 208 unchanged lines hidden (view full) ---

279 /* VSI stats */
280 struct rtnl_link_stats64 net_stats;
281 struct ice_eth_stats eth_stats;
282 struct ice_eth_stats eth_stats_prev;
283
284 struct list_head tmp_sync_list; /* MAC filters to be synced */
285 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
286
280 u8 irqs_ready;
281 u8 current_isup; /* Sync 'link up' logging */
282 u8 stat_offsets_loaded;
283 u8 vlan_ena;
287 u8 irqs_ready:1;
288 u8 current_isup:1; /* Sync 'link up' logging */
289 u8 stat_offsets_loaded:1;
290 u8 vlan_ena:1;
284
285 /* queue information */
286 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
287 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
288 u16 txq_map[ICE_MAX_TXQS]; /* index in pf->avail_txqs */
289 u16 rxq_map[ICE_MAX_RXQS]; /* index in pf->avail_rxqs */
290 u16 alloc_txq; /* Allocated Tx queues */
291 u16 num_txq; /* Used Tx queues */

--- 33 unchanged lines hidden (view full) ---

325 ICE_FLAG_MSIX_ENA,
326 ICE_FLAG_FLTR_SYNC,
327 ICE_FLAG_RSS_ENA,
328 ICE_FLAG_SRIOV_ENA,
329 ICE_FLAG_SRIOV_CAPABLE,
330 ICE_FLAG_DCB_CAPABLE,
331 ICE_FLAG_DCB_ENA,
332 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
291
292 /* queue information */
293 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
294 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
295 u16 txq_map[ICE_MAX_TXQS]; /* index in pf->avail_txqs */
296 u16 rxq_map[ICE_MAX_RXQS]; /* index in pf->avail_rxqs */
297 u16 alloc_txq; /* Allocated Tx queues */
298 u16 num_txq; /* Used Tx queues */

--- 33 unchanged lines hidden (view full) ---

332 ICE_FLAG_MSIX_ENA,
333 ICE_FLAG_FLTR_SYNC,
334 ICE_FLAG_RSS_ENA,
335 ICE_FLAG_SRIOV_ENA,
336 ICE_FLAG_SRIOV_CAPABLE,
337 ICE_FLAG_DCB_CAPABLE,
338 ICE_FLAG_DCB_ENA,
339 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
333 ICE_FLAG_DISABLE_FW_LLDP,
340 ICE_FLAG_ENABLE_FW_LLDP,
334 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
335 ICE_PF_FLAGS_NBITS /* must be last */
336};
337
338struct ice_pf {
339 struct pci_dev *pdev;
340
341 /* OS reserved IRQ details */

--- 37 unchanged lines hidden (view full) ---

379 u16 corer_count; /* Core reset count */
380 u16 globr_count; /* Global reset count */
381 u16 empr_count; /* EMP reset count */
382 u16 pfr_count; /* PF reset count */
383
384 struct ice_hw_port_stats stats;
385 struct ice_hw_port_stats stats_prev;
386 struct ice_hw hw;
341 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
342 ICE_PF_FLAGS_NBITS /* must be last */
343};
344
345struct ice_pf {
346 struct pci_dev *pdev;
347
348 /* OS reserved IRQ details */

--- 37 unchanged lines hidden (view full) ---

386 u16 corer_count; /* Core reset count */
387 u16 globr_count; /* Global reset count */
388 u16 empr_count; /* EMP reset count */
389 u16 pfr_count; /* PF reset count */
390
391 struct ice_hw_port_stats stats;
392 struct ice_hw_port_stats stats_prev;
393 struct ice_hw hw;
387 u8 stat_prev_loaded; /* has previous stats been loaded */
394 u8 stat_prev_loaded:1; /* has previous stats been loaded */
388#ifdef CONFIG_DCB
389 u16 dcbx_cap;
390#endif /* CONFIG_DCB */
391 u32 tx_timeout_count;
392 unsigned long tx_timeout_last_recovery;
393 u32 tx_timeout_recovery_level;
394 char int_name[ICE_INT_NAME_STR_LEN];
395};

--- 50 unchanged lines hidden (view full) ---

446
447void ice_set_ethtool_ops(struct net_device *netdev);
448int ice_up(struct ice_vsi *vsi);
449int ice_down(struct ice_vsi *vsi);
450int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
451int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
452void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
453void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
395#ifdef CONFIG_DCB
396 u16 dcbx_cap;
397#endif /* CONFIG_DCB */
398 u32 tx_timeout_count;
399 unsigned long tx_timeout_last_recovery;
400 u32 tx_timeout_recovery_level;
401 char int_name[ICE_INT_NAME_STR_LEN];
402};

--- 50 unchanged lines hidden (view full) ---

453
454void ice_set_ethtool_ops(struct net_device *netdev);
455int ice_up(struct ice_vsi *vsi);
456int ice_down(struct ice_vsi *vsi);
457int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
458int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
459void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
460void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
454void ice_napi_del(struct ice_vsi *vsi);
455#ifdef CONFIG_DCB
456int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked);
457void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked);
458#endif /* CONFIG_DCB */
459
460#endif /* _ICE_H_ */
461#ifdef CONFIG_DCB
462int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked);
463void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked);
464#endif /* CONFIG_DCB */
465
466#endif /* _ICE_H_ */