gve.h (ed32f8d42cee118b075e4372a55c7739a11094b2) gve.h (438b43bdb95d3189e0098919f321c014ed71f410)
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 * Google virtual Ethernet (gve) driver
3 *
4 * Copyright (C) 2015-2019 Google, Inc.
5 */
6
7#ifndef _GVE_H_
8#define _GVE_H_

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26#define GVE_TX_MAX_IOVEC 4
27/* 1 for management, 1 for rx, 1 for tx */
28#define GVE_MIN_MSIX 3
29
30/* Each slot in the desc ring has a 1:1 mapping to a slot in the data ring */
31struct gve_rx_desc_queue {
32 struct gve_rx_desc *desc_ring; /* the descriptor ring */
33 dma_addr_t bus; /* the bus for the desc_ring */
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 * Google virtual Ethernet (gve) driver
3 *
4 * Copyright (C) 2015-2019 Google, Inc.
5 */
6
7#ifndef _GVE_H_
8#define _GVE_H_

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26#define GVE_TX_MAX_IOVEC 4
27/* 1 for management, 1 for rx, 1 for tx */
28#define GVE_MIN_MSIX 3
29
30/* Each slot in the desc ring has a 1:1 mapping to a slot in the data ring */
31struct gve_rx_desc_queue {
32 struct gve_rx_desc *desc_ring; /* the descriptor ring */
33 dma_addr_t bus; /* the bus for the desc_ring */
34 u32 cnt; /* free-running total number of completed packets */
35 u32 fill_cnt; /* free-running total number of descriptors posted */
36 u32 mask; /* masks the cnt to the size of the ring */
37 u8 seqno; /* the next expected seqno for this desc*/
38};
39
40/* The page info for a single slot in the RX data queue */
41struct gve_rx_slot_page_info {
42 struct page *page;
43 void *page_address;
44 u32 page_offset; /* offset to write to in page */

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55};
56
57/* Each slot in the data ring has a 1:1 mapping to a slot in the desc ring */
58struct gve_rx_data_queue {
59 struct gve_rx_data_slot *data_ring; /* read by NIC */
60 dma_addr_t data_bus; /* dma mapping of the slots */
61 struct gve_rx_slot_page_info *page_info; /* page info of the buffers */
62 struct gve_queue_page_list *qpl; /* qpl assigned to this queue */
34 u8 seqno; /* the next expected seqno for this desc*/
35};
36
37/* The page info for a single slot in the RX data queue */
38struct gve_rx_slot_page_info {
39 struct page *page;
40 void *page_address;
41 u32 page_offset; /* offset to write to in page */

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52};
53
54/* Each slot in the data ring has a 1:1 mapping to a slot in the desc ring */
55struct gve_rx_data_queue {
56 struct gve_rx_data_slot *data_ring; /* read by NIC */
57 dma_addr_t data_bus; /* dma mapping of the slots */
58 struct gve_rx_slot_page_info *page_info; /* page info of the buffers */
59 struct gve_queue_page_list *qpl; /* qpl assigned to this queue */
63 u32 mask; /* masks the cnt to the size of the ring */
64 u32 cnt; /* free-running total number of completed packets */
65};
66
67struct gve_priv;
68
69/* An RX ring that contains a power-of-two sized desc and data ring. */
70struct gve_rx_ring {
71 struct gve_priv *gve;
72 struct gve_rx_desc_queue desc;
73 struct gve_rx_data_queue data;
74 u64 rbytes; /* free-running bytes received */
75 u64 rpackets; /* free-running packets received */
60};
61
62struct gve_priv;
63
64/* An RX ring that contains a power-of-two sized desc and data ring. */
65struct gve_rx_ring {
66 struct gve_priv *gve;
67 struct gve_rx_desc_queue desc;
68 struct gve_rx_data_queue data;
69 u64 rbytes; /* free-running bytes received */
70 u64 rpackets; /* free-running packets received */
71 u32 cnt; /* free-running total number of completed packets */
72 u32 fill_cnt; /* free-running total number of descs and buffs posted */
73 u32 mask; /* masks the cnt and fill_cnt to the size of the ring */
76 u32 q_num; /* queue index */
77 u32 ntfy_id; /* notification block index */
78 struct gve_queue_resources *q_resources; /* head and tail pointer idx */
79 dma_addr_t q_resources_bus; /* dma address for the queue resources */
80 struct u64_stats_sync statss; /* sync stats for 32bit archs */
81};
82
83/* A TX desc ring entry */

--- 376 unchanged lines hidden --- 		74 u32 q_num; /* queue index */
75 u32 ntfy_id; /* notification block index */
76 struct gve_queue_resources *q_resources; /* head and tail pointer idx */
77 dma_addr_t q_resources_bus; /* dma address for the queue resources */
78 struct u64_stats_sync statss; /* sync stats for 32bit archs */
79};
80
81/* A TX desc ring entry */

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