bgmac.c (db791eb2970bad193b1dc95a4461b222dd22cb64) bgmac.c (f6a95a24957aec5bb488c3f978c4ed508177998f)
1/*
2 * Driver for (BCM4706)? GBit MAC core on BCMA bus.
3 *
4 * Copyright (C) 2012 Rafał Miłecki <zajec5@gmail.com>
5 *
6 * Licensed under the GNU/GPL. See COPYING for details.
7 */
8
1/*
2 * Driver for (BCM4706)? GBit MAC core on BCMA bus.
3 *
4 * Copyright (C) 2012 Rafał Miłecki <zajec5@gmail.com>
5 *
6 * Licensed under the GNU/GPL. See COPYING for details.
7 */
8
9#include "bgmac.h"
10
9
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/delay.h>
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
12#include <linux/bcma/bcma.h>
14#include <linux/etherdevice.h>
13#include <linux/etherdevice.h>
15#include <linux/mii.h>
16#include <linux/phy.h>
17#include <linux/phy_fixed.h>
18#include <linux/interrupt.h>
19#include <linux/dma-mapping.h>
20#include <linux/bcm47xx_nvram.h>
14#include <linux/bcm47xx_nvram.h>
15#include "bgmac.h"
21
16
22static const struct bcma_device_id bgmac_bcma_tbl[] = {
23 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
24 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
25 {},
26};
27MODULE_DEVICE_TABLE(bcma, bgmac_bcma_tbl);
28
29static inline bool bgmac_is_bcm4707_family(struct bgmac *bgmac)
30{
31 switch (bgmac->core->bus->chipinfo.id) {
32 case BCMA_CHIP_ID_BCM4707:
33 case BCMA_CHIP_ID_BCM47094:
34 case BCMA_CHIP_ID_BCM53018:
35 return true;
36 default:
37 return false;
38 }
39}
40
41static bool bgmac_wait_value(struct bcma_device *core, u16 reg, u32 mask,
17static bool bgmac_wait_value(struct bgmac *bgmac, u16 reg, u32 mask,
42 u32 value, int timeout)
43{
44 u32 val;
45 int i;
46
47 for (i = 0; i < timeout / 10; i++) {
18 u32 value, int timeout)
19{
20 u32 val;
21 int i;
22
23 for (i = 0; i < timeout / 10; i++) {
48 val = bcma_read32(core, reg);
24 val = bgmac_read(bgmac, reg);
49 if ((val & mask) == value)
50 return true;
51 udelay(10);
52 }
25 if ((val & mask) == value)
26 return true;
27 udelay(10);
28 }
53 dev_err(&core->dev, "Timeout waiting for reg 0x%X\n", reg);
29 dev_err(bgmac->dev, "Timeout waiting for reg 0x%X\n", reg);
54 return false;
55}
56
57/**************************************************
58 * DMA
59 **************************************************/
60
61static void bgmac_dma_tx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)

--- 22 unchanged lines hidden (view full) ---

84 udelay(10);
85 }
86 if (i)
87 dev_err(bgmac->dev, "Timeout suspending DMA TX ring 0x%X (BGMAC_DMA_TX_STAT: 0x%08X)\n",
88 ring->mmio_base, val);
89
90 /* Remove SUSPEND bit */
91 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0);
30 return false;
31}
32
33/**************************************************
34 * DMA
35 **************************************************/
36
37static void bgmac_dma_tx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)

--- 22 unchanged lines hidden (view full) ---

60 udelay(10);
61 }
62 if (i)
63 dev_err(bgmac->dev, "Timeout suspending DMA TX ring 0x%X (BGMAC_DMA_TX_STAT: 0x%08X)\n",
64 ring->mmio_base, val);
65
66 /* Remove SUSPEND bit */
67 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0);
92 if (!bgmac_wait_value(bgmac->core,
68 if (!bgmac_wait_value(bgmac,
93 ring->mmio_base + BGMAC_DMA_TX_STATUS,
94 BGMAC_DMA_TX_STAT, BGMAC_DMA_TX_STAT_DISABLED,
95 10000)) {
96 dev_warn(bgmac->dev, "DMA TX ring 0x%X wasn't disabled on time, waiting additional 300us\n",
97 ring->mmio_base);
98 udelay(300);
99 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
100 if ((val & BGMAC_DMA_TX_STAT) != BGMAC_DMA_TX_STAT_DISABLED)

--- 211 unchanged lines hidden (view full) ---

312}
313
314static void bgmac_dma_rx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)
315{
316 if (!ring->mmio_base)
317 return;
318
319 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, 0);
69 ring->mmio_base + BGMAC_DMA_TX_STATUS,
70 BGMAC_DMA_TX_STAT, BGMAC_DMA_TX_STAT_DISABLED,
71 10000)) {
72 dev_warn(bgmac->dev, "DMA TX ring 0x%X wasn't disabled on time, waiting additional 300us\n",
73 ring->mmio_base);
74 udelay(300);
75 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
76 if ((val & BGMAC_DMA_TX_STAT) != BGMAC_DMA_TX_STAT_DISABLED)

--- 211 unchanged lines hidden (view full) ---

288}
289
290static void bgmac_dma_rx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)
291{
292 if (!ring->mmio_base)
293 return;
294
295 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, 0);
320 if (!bgmac_wait_value(bgmac->core,
296 if (!bgmac_wait_value(bgmac,
321 ring->mmio_base + BGMAC_DMA_RX_STATUS,
322 BGMAC_DMA_RX_STAT, BGMAC_DMA_RX_STAT_DISABLED,
323 10000))
324 dev_err(bgmac->dev, "Reset of ring 0x%X RX failed\n",
325 ring->mmio_base);
326}
327
328static void bgmac_dma_rx_enable(struct bgmac *bgmac,

--- 306 unchanged lines hidden (view full) ---

635 BGMAC_DMA_BASE2, BGMAC_DMA_BASE3, };
636 int size; /* ring size: different for Tx and Rx */
637 int err;
638 int i;
639
640 BUILD_BUG_ON(BGMAC_MAX_TX_RINGS > ARRAY_SIZE(ring_base));
641 BUILD_BUG_ON(BGMAC_MAX_RX_RINGS > ARRAY_SIZE(ring_base));
642
297 ring->mmio_base + BGMAC_DMA_RX_STATUS,
298 BGMAC_DMA_RX_STAT, BGMAC_DMA_RX_STAT_DISABLED,
299 10000))
300 dev_err(bgmac->dev, "Reset of ring 0x%X RX failed\n",
301 ring->mmio_base);
302}
303
304static void bgmac_dma_rx_enable(struct bgmac *bgmac,

--- 306 unchanged lines hidden (view full) ---

611 BGMAC_DMA_BASE2, BGMAC_DMA_BASE3, };
612 int size; /* ring size: different for Tx and Rx */
613 int err;
614 int i;
615
616 BUILD_BUG_ON(BGMAC_MAX_TX_RINGS > ARRAY_SIZE(ring_base));
617 BUILD_BUG_ON(BGMAC_MAX_RX_RINGS > ARRAY_SIZE(ring_base));
618
643 if (!(bcma_aread32(bgmac->core, BCMA_IOST) & BCMA_IOST_DMA64)) {
619 if (!(bgmac_idm_read(bgmac, BCMA_IOST) & BCMA_IOST_DMA64)) {
644 dev_err(bgmac->dev, "Core does not report 64-bit DMA\n");
645 return -ENOTSUPP;
646 }
647
648 for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) {
649 ring = &bgmac->tx_ring[i];
650 ring->mmio_base = ring_base[i];
651

--- 215 unchanged lines hidden (view full) ---

867 if (bgmac->mac_duplex == DUPLEX_HALF)
868 set |= BGMAC_CMDCFG_HD;
869
870 bgmac_cmdcfg_maskset(bgmac, mask, set, true);
871}
872
873static void bgmac_miiconfig(struct bgmac *bgmac)
874{
620 dev_err(bgmac->dev, "Core does not report 64-bit DMA\n");
621 return -ENOTSUPP;
622 }
623
624 for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) {
625 ring = &bgmac->tx_ring[i];
626 ring->mmio_base = ring_base[i];
627

--- 215 unchanged lines hidden (view full) ---

843 if (bgmac->mac_duplex == DUPLEX_HALF)
844 set |= BGMAC_CMDCFG_HD;
845
846 bgmac_cmdcfg_maskset(bgmac, mask, set, true);
847}
848
849static void bgmac_miiconfig(struct bgmac *bgmac)
850{
875 struct bcma_device *core = bgmac->core;
876
877 if (bgmac->feature_flags & BGMAC_FEAT_FORCE_SPEED_2500) {
851 if (bgmac->feature_flags & BGMAC_FEAT_FORCE_SPEED_2500) {
878 bcma_awrite32(core, BCMA_IOCTL,
879 bcma_aread32(core, BCMA_IOCTL) | 0x40 |
880 BGMAC_BCMA_IOCTL_SW_CLKEN);
852 bgmac_idm_write(bgmac, BCMA_IOCTL,
853 bgmac_idm_read(bgmac, BCMA_IOCTL) | 0x40 |
854 BGMAC_BCMA_IOCTL_SW_CLKEN);
881 bgmac->mac_speed = SPEED_2500;
882 bgmac->mac_duplex = DUPLEX_FULL;
883 bgmac_mac_speed(bgmac);
884 } else {
885 u8 imode;
886
887 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
888 BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
889 if (imode == 0 || imode == 1) {
890 bgmac->mac_speed = SPEED_100;
891 bgmac->mac_duplex = DUPLEX_FULL;
892 bgmac_mac_speed(bgmac);
893 }
894 }
895}
896
897/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipreset */
898static void bgmac_chip_reset(struct bgmac *bgmac)
899{
855 bgmac->mac_speed = SPEED_2500;
856 bgmac->mac_duplex = DUPLEX_FULL;
857 bgmac_mac_speed(bgmac);
858 } else {
859 u8 imode;
860
861 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
862 BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
863 if (imode == 0 || imode == 1) {
864 bgmac->mac_speed = SPEED_100;
865 bgmac->mac_duplex = DUPLEX_FULL;
866 bgmac_mac_speed(bgmac);
867 }
868 }
869}
870
871/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipreset */
872static void bgmac_chip_reset(struct bgmac *bgmac)
873{
900 struct bcma_device *core = bgmac->core;
901 u32 cmdcfg_sr;
902 u32 iost;
903 int i;
904
874 u32 cmdcfg_sr;
875 u32 iost;
876 int i;
877
905 if (bcma_core_is_enabled(core)) {
878 if (bgmac_clk_enabled(bgmac)) {
906 if (!bgmac->stats_grabbed) {
907 /* bgmac_chip_stats_update(bgmac); */
908 bgmac->stats_grabbed = true;
909 }
910
911 for (i = 0; i < BGMAC_MAX_TX_RINGS; i++)
912 bgmac_dma_tx_reset(bgmac, &bgmac->tx_ring[i]);
913
914 bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_ML, false);
915 udelay(1);
916
917 for (i = 0; i < BGMAC_MAX_RX_RINGS; i++)
918 bgmac_dma_rx_reset(bgmac, &bgmac->rx_ring[i]);
919
920 /* TODO: Clear software multicast filter list */
921 }
922
879 if (!bgmac->stats_grabbed) {
880 /* bgmac_chip_stats_update(bgmac); */
881 bgmac->stats_grabbed = true;
882 }
883
884 for (i = 0; i < BGMAC_MAX_TX_RINGS; i++)
885 bgmac_dma_tx_reset(bgmac, &bgmac->tx_ring[i]);
886
887 bgmac_cmdcfg_maskset(bgmac, ~0, BGMAC_CMDCFG_ML, false);
888 udelay(1);
889
890 for (i = 0; i < BGMAC_MAX_RX_RINGS; i++)
891 bgmac_dma_rx_reset(bgmac, &bgmac->rx_ring[i]);
892
893 /* TODO: Clear software multicast filter list */
894 }
895
923 iost = bcma_aread32(core, BCMA_IOST);
896 iost = bgmac_idm_read(bgmac, BCMA_IOST);
924 if (bgmac->feature_flags & BGMAC_FEAT_IOST_ATTACHED)
925 iost &= ~BGMAC_BCMA_IOST_ATTACHED;
926
927 /* 3GMAC: for BCM4707 & BCM47094, only do core reset at bgmac_probe() */
928 if (!(bgmac->feature_flags & BGMAC_FEAT_NO_RESET)) {
929 u32 flags = 0;
930 if (iost & BGMAC_BCMA_IOST_ATTACHED) {
931 flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
932 if (!bgmac->has_robosw)
933 flags |= BGMAC_BCMA_IOCTL_SW_RESET;
934 }
897 if (bgmac->feature_flags & BGMAC_FEAT_IOST_ATTACHED)
898 iost &= ~BGMAC_BCMA_IOST_ATTACHED;
899
900 /* 3GMAC: for BCM4707 & BCM47094, only do core reset at bgmac_probe() */
901 if (!(bgmac->feature_flags & BGMAC_FEAT_NO_RESET)) {
902 u32 flags = 0;
903 if (iost & BGMAC_BCMA_IOST_ATTACHED) {
904 flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
905 if (!bgmac->has_robosw)
906 flags |= BGMAC_BCMA_IOCTL_SW_RESET;
907 }
935 bcma_core_enable(core, flags);
908 bgmac_clk_enable(bgmac, flags);
936 }
937
938 /* Request Misc PLL for corerev > 2 */
939 if (bgmac->feature_flags & BGMAC_FEAT_MISC_PLL_REQ) {
940 bgmac_set(bgmac, BCMA_CLKCTLST,
941 BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
909 }
910
911 /* Request Misc PLL for corerev > 2 */
912 if (bgmac->feature_flags & BGMAC_FEAT_MISC_PLL_REQ) {
913 bgmac_set(bgmac, BCMA_CLKCTLST,
914 BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
942 bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
915 bgmac_wait_value(bgmac, BCMA_CLKCTLST,
943 BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
944 BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
945 1000);
946 }
947
948 if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_PHY) {
916 BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
917 BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
918 1000);
919 }
920
921 if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_PHY) {
949 struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
950 u8 et_swtype = 0;
951 u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
952 BGMAC_CHIPCTL_1_IF_TYPE_MII;
953 char buf[4];
954
955 if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
956 if (kstrtou8(buf, 0, &et_swtype))
957 dev_err(bgmac->dev, "Failed to parse et_swtype (%s)\n",
958 buf);
959 et_swtype &= 0x0f;
960 et_swtype <<= 4;
961 sw_type = et_swtype;
962 } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_EPHYRMII) {
963 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
964 } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_RGMII) {
965 sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
966 BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
967 }
922 u8 et_swtype = 0;
923 u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
924 BGMAC_CHIPCTL_1_IF_TYPE_MII;
925 char buf[4];
926
927 if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
928 if (kstrtou8(buf, 0, &et_swtype))
929 dev_err(bgmac->dev, "Failed to parse et_swtype (%s)\n",
930 buf);
931 et_swtype &= 0x0f;
932 et_swtype <<= 4;
933 sw_type = et_swtype;
934 } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_EPHYRMII) {
935 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
936 } else if (bgmac->feature_flags & BGMAC_FEAT_SW_TYPE_RGMII) {
937 sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
938 BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
939 }
968 bcma_chipco_chipctl_maskset(cc, 1,
969 ~(BGMAC_CHIPCTL_1_IF_TYPE_MASK |
970 BGMAC_CHIPCTL_1_SW_TYPE_MASK),
971 sw_type);
940 bgmac_cco_ctl_maskset(bgmac, 1, ~(BGMAC_CHIPCTL_1_IF_TYPE_MASK |
941 BGMAC_CHIPCTL_1_SW_TYPE_MASK),
942 sw_type);
972 }
973
974 if (iost & BGMAC_BCMA_IOST_ATTACHED && !bgmac->has_robosw)
943 }
944
945 if (iost & BGMAC_BCMA_IOST_ATTACHED && !bgmac->has_robosw)
975 bcma_awrite32(core, BCMA_IOCTL,
976 bcma_aread32(core, BCMA_IOCTL) &
977 ~BGMAC_BCMA_IOCTL_SW_RESET);
946 bgmac_idm_write(bgmac, BCMA_IOCTL,
947 bgmac_idm_read(bgmac, BCMA_IOCTL) &
948 ~BGMAC_BCMA_IOCTL_SW_RESET);
978
979 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_reset
980 * Specs don't say about using BGMAC_CMDCFG_SR, but in this routine
981 * BGMAC_CMDCFG is read _after_ putting chip in a reset. So it has to
982 * be keps until taking MAC out of the reset.
983 */
984 if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
985 cmdcfg_sr = BGMAC_CMDCFG_SR_REV4;

--- 19 unchanged lines hidden (view full) ---

1005 BGMAC_CMDCFG_CFE |
1006 cmdcfg_sr,
1007 false);
1008 bgmac->mac_speed = SPEED_UNKNOWN;
1009 bgmac->mac_duplex = DUPLEX_UNKNOWN;
1010
1011 bgmac_clear_mib(bgmac);
1012 if (bgmac->feature_flags & BGMAC_FEAT_CMN_PHY_CTL)
949
950 /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_reset
951 * Specs don't say about using BGMAC_CMDCFG_SR, but in this routine
952 * BGMAC_CMDCFG is read _after_ putting chip in a reset. So it has to
953 * be keps until taking MAC out of the reset.
954 */
955 if (bgmac->feature_flags & BGMAC_FEAT_CMDCFG_SR_REV4)
956 cmdcfg_sr = BGMAC_CMDCFG_SR_REV4;

--- 19 unchanged lines hidden (view full) ---

976 BGMAC_CMDCFG_CFE |
977 cmdcfg_sr,
978 false);
979 bgmac->mac_speed = SPEED_UNKNOWN;
980 bgmac->mac_duplex = DUPLEX_UNKNOWN;
981
982 bgmac_clear_mib(bgmac);
983 if (bgmac->feature_flags & BGMAC_FEAT_CMN_PHY_CTL)
1013 bcma_maskset32(bgmac->cmn, BCMA_GMAC_CMN_PHY_CTL, ~0,
1014 BCMA_GMAC_CMN_PC_MTE);
984 bgmac_cmn_maskset32(bgmac, BCMA_GMAC_CMN_PHY_CTL, ~0,
985 BCMA_GMAC_CMN_PC_MTE);
1015 else
1016 bgmac_set(bgmac, BGMAC_PHY_CNTL, BGMAC_PC_MTE);
1017 bgmac_miiconfig(bgmac);
1018 if (bgmac->mii_bus)
1019 bgmac->mii_bus->reset(bgmac->mii_bus);
1020
1021 netdev_reset_queue(bgmac->net_dev);
1022}

--- 28 unchanged lines hidden (view full) ---

1051 cmdcfg |= BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE;
1052 bgmac_write(bgmac, BGMAC_CMDCFG, cmdcfg);
1053
1054 mode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
1055 BGMAC_DS_MM_SHIFT;
1056 if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST || mode != 0)
1057 bgmac_set(bgmac, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
1058 if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST && mode == 2)
986 else
987 bgmac_set(bgmac, BGMAC_PHY_CNTL, BGMAC_PC_MTE);
988 bgmac_miiconfig(bgmac);
989 if (bgmac->mii_bus)
990 bgmac->mii_bus->reset(bgmac->mii_bus);
991
992 netdev_reset_queue(bgmac->net_dev);
993}

--- 28 unchanged lines hidden (view full) ---

1022 cmdcfg |= BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE;
1023 bgmac_write(bgmac, BGMAC_CMDCFG, cmdcfg);
1024
1025 mode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
1026 BGMAC_DS_MM_SHIFT;
1027 if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST || mode != 0)
1028 bgmac_set(bgmac, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
1029 if (bgmac->feature_flags & BGMAC_FEAT_CLKCTLST && mode == 2)
1059 bcma_chipco_chipctl_maskset(&bgmac->core->bus->drv_cc, 1, ~0,
1060 BGMAC_CHIPCTL_1_RXC_DLL_BYPASS);
1030 bgmac_cco_ctl_maskset(bgmac, 1, ~0,
1031 BGMAC_CHIPCTL_1_RXC_DLL_BYPASS);
1061
1062 if (bgmac->feature_flags & (BGMAC_FEAT_FLW_CTRL1 |
1063 BGMAC_FEAT_FLW_CTRL2)) {
1064 u32 fl_ctl;
1065
1066 if (bgmac->feature_flags & BGMAC_FEAT_FLW_CTRL1)
1067 fl_ctl = 0x2300e1;
1068 else

--- 5 unchanged lines hidden (view full) ---

1074
1075 if (bgmac->feature_flags & BGMAC_FEAT_SET_RXQ_CLK) {
1076 u32 rxq_ctl;
1077 u16 bp_clk;
1078 u8 mdp;
1079
1080 rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
1081 rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
1032
1033 if (bgmac->feature_flags & (BGMAC_FEAT_FLW_CTRL1 |
1034 BGMAC_FEAT_FLW_CTRL2)) {
1035 u32 fl_ctl;
1036
1037 if (bgmac->feature_flags & BGMAC_FEAT_FLW_CTRL1)
1038 fl_ctl = 0x2300e1;
1039 else

--- 5 unchanged lines hidden (view full) ---

1045
1046 if (bgmac->feature_flags & BGMAC_FEAT_SET_RXQ_CLK) {
1047 u32 rxq_ctl;
1048 u16 bp_clk;
1049 u8 mdp;
1050
1051 rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
1052 rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
1082 bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
1083 1000000;
1053 bp_clk = bgmac_get_bus_clock(bgmac) / 1000000;
1084 mdp = (bp_clk * 128 / 1000) - 3;
1085 rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
1086 bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
1087 }
1088}
1089
1090/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
1091static void bgmac_chip_init(struct bgmac *bgmac)

--- 78 unchanged lines hidden (view full) ---

1170
1171 err = bgmac_dma_init(bgmac);
1172 if (err)
1173 return err;
1174
1175 /* Specs say about reclaiming rings here, but we do that in DMA init */
1176 bgmac_chip_init(bgmac);
1177
1054 mdp = (bp_clk * 128 / 1000) - 3;
1055 rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
1056 bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
1057 }
1058}
1059
1060/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
1061static void bgmac_chip_init(struct bgmac *bgmac)

--- 78 unchanged lines hidden (view full) ---

1140
1141 err = bgmac_dma_init(bgmac);
1142 if (err)
1143 return err;
1144
1145 /* Specs say about reclaiming rings here, but we do that in DMA init */
1146 bgmac_chip_init(bgmac);
1147
1178 err = request_irq(bgmac->core->irq, bgmac_interrupt, IRQF_SHARED,
1148 err = request_irq(bgmac->irq, bgmac_interrupt, IRQF_SHARED,
1179 KBUILD_MODNAME, net_dev);
1180 if (err < 0) {
1181 dev_err(bgmac->dev, "IRQ request error: %d!\n", err);
1182 bgmac_dma_cleanup(bgmac);
1183 return err;
1184 }
1185 napi_enable(&bgmac->napi);
1186

--- 9 unchanged lines hidden (view full) ---

1196 struct bgmac *bgmac = netdev_priv(net_dev);
1197
1198 netif_carrier_off(net_dev);
1199
1200 phy_stop(net_dev->phydev);
1201
1202 napi_disable(&bgmac->napi);
1203 bgmac_chip_intrs_off(bgmac);
1149 KBUILD_MODNAME, net_dev);
1150 if (err < 0) {
1151 dev_err(bgmac->dev, "IRQ request error: %d!\n", err);
1152 bgmac_dma_cleanup(bgmac);
1153 return err;
1154 }
1155 napi_enable(&bgmac->napi);
1156

--- 9 unchanged lines hidden (view full) ---

1166 struct bgmac *bgmac = netdev_priv(net_dev);
1167
1168 netif_carrier_off(net_dev);
1169
1170 phy_stop(net_dev->phydev);
1171
1172 napi_disable(&bgmac->napi);
1173 bgmac_chip_intrs_off(bgmac);
1204 free_irq(bgmac->core->irq, net_dev);
1174 free_irq(bgmac->irq, net_dev);
1205
1206 bgmac_chip_reset(bgmac);
1207 bgmac_dma_cleanup(bgmac);
1208
1209 return 0;
1210}
1211
1212static netdev_tx_t bgmac_start_xmit(struct sk_buff *skb,

--- 162 unchanged lines hidden (view full) ---

1375 data[i] = val;
1376 }
1377}
1378
1379static void bgmac_get_drvinfo(struct net_device *net_dev,
1380 struct ethtool_drvinfo *info)
1381{
1382 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
1175
1176 bgmac_chip_reset(bgmac);
1177 bgmac_dma_cleanup(bgmac);
1178
1179 return 0;
1180}
1181
1182static netdev_tx_t bgmac_start_xmit(struct sk_buff *skb,

--- 162 unchanged lines hidden (view full) ---

1345 data[i] = val;
1346 }
1347}
1348
1349static void bgmac_get_drvinfo(struct net_device *net_dev,
1350 struct ethtool_drvinfo *info)
1351{
1352 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
1383 strlcpy(info->bus_info, "BCMA", sizeof(info->bus_info));
1353 strlcpy(info->bus_info, "AXI", sizeof(info->bus_info));
1384}
1385
1386static const struct ethtool_ops bgmac_ethtool_ops = {
1387 .get_strings = bgmac_get_strings,
1388 .get_sset_count = bgmac_get_sset_count,
1389 .get_ethtool_stats = bgmac_get_ethtool_stats,
1390 .get_drvinfo = bgmac_get_drvinfo,
1391 .get_link_ksettings = phy_ethtool_get_link_ksettings,

--- 67 unchanged lines hidden (view full) ---

1459 if (IS_ERR(phy_dev)) {
1460 dev_err(bgmac->dev, "PHY connecton failed\n");
1461 return PTR_ERR(phy_dev);
1462 }
1463
1464 return 0;
1465}
1466
1354}
1355
1356static const struct ethtool_ops bgmac_ethtool_ops = {
1357 .get_strings = bgmac_get_strings,
1358 .get_sset_count = bgmac_get_sset_count,
1359 .get_ethtool_stats = bgmac_get_ethtool_stats,
1360 .get_drvinfo = bgmac_get_drvinfo,
1361 .get_link_ksettings = phy_ethtool_get_link_ksettings,

--- 67 unchanged lines hidden (view full) ---

1429 if (IS_ERR(phy_dev)) {
1430 dev_err(bgmac->dev, "PHY connecton failed\n");
1431 return PTR_ERR(phy_dev);
1432 }
1433
1434 return 0;
1435}
1436
1467static int bgmac_probe(struct bcma_device *core)
1437int bgmac_enet_probe(struct bgmac *info)
1468{
1469 struct net_device *net_dev;
1470 struct bgmac *bgmac;
1438{
1439 struct net_device *net_dev;
1440 struct bgmac *bgmac;
1471 struct ssb_sprom *sprom = &core->bus->sprom;
1472 u8 *mac;
1473 int err;
1474
1441 int err;
1442
1475 switch (core->core_unit) {
1476 case 0:
1477 mac = sprom->et0mac;
1478 break;
1479 case 1:
1480 mac = sprom->et1mac;
1481 break;
1482 case 2:
1483 mac = sprom->et2mac;
1484 break;
1485 default:
1486 dev_err(&core->dev, "Unsupported core_unit %d\n",
1487 core->core_unit);
1488 return -ENOTSUPP;
1489 }
1490
1491 if (!is_valid_ether_addr(mac)) {
1492 dev_err(&core->dev, "Invalid MAC addr: %pM\n", mac);
1493 eth_random_addr(mac);
1494 dev_warn(&core->dev, "Using random MAC: %pM\n", mac);
1495 }
1496
1497 /* This (reset &) enable is not preset in specs or reference driver but
1498 * Broadcom does it in arch PCI code when enabling fake PCI device.
1499 */
1500 bcma_core_enable(core, 0);
1501
1502 /* Allocation and references */
1503 net_dev = alloc_etherdev(sizeof(*bgmac));
1504 if (!net_dev)
1505 return -ENOMEM;
1443 /* Allocation and references */
1444 net_dev = alloc_etherdev(sizeof(*bgmac));
1445 if (!net_dev)
1446 return -ENOMEM;
1447
1506 net_dev->netdev_ops = &bgmac_netdev_ops;
1448 net_dev->netdev_ops = &bgmac_netdev_ops;
1507 net_dev->irq = core->irq;
1508 net_dev->ethtool_ops = &bgmac_ethtool_ops;
1509 bgmac = netdev_priv(net_dev);
1449 net_dev->ethtool_ops = &bgmac_ethtool_ops;
1450 bgmac = netdev_priv(net_dev);
1510 bgmac->dev = &core->dev;
1511 bgmac->dma_dev = core->dma_dev;
1451 memcpy(bgmac, info, sizeof(*bgmac));
1512 bgmac->net_dev = net_dev;
1452 bgmac->net_dev = net_dev;
1513 bgmac->core = core;
1514 bcma_set_drvdata(core, bgmac);
1515 SET_NETDEV_DEV(net_dev, &core->dev);
1453 net_dev->irq = bgmac->irq;
1454 SET_NETDEV_DEV(net_dev, bgmac->dev);
1516
1455
1517 /* Defaults */
1518 memcpy(bgmac->net_dev->dev_addr, mac, ETH_ALEN);
1519
1520 /* On BCM4706 we need common core to access PHY */
1521 if (core->id.id == BCMA_CORE_4706_MAC_GBIT &&
1522 !core->bus->drv_gmac_cmn.core) {
1523 dev_err(bgmac->dev, "GMAC CMN core not found (required for BCM4706)\n");
1524 err = -ENODEV;
1525 goto err_netdev_free;
1456 if (!is_valid_ether_addr(bgmac->mac_addr)) {
1457 dev_err(bgmac->dev, "Invalid MAC addr: %pM\n",
1458 bgmac->mac_addr);
1459 eth_random_addr(bgmac->mac_addr);
1460 dev_warn(bgmac->dev, "Using random MAC: %pM\n",
1461 bgmac->mac_addr);
1526 }
1462 }
1527 bgmac->cmn = core->bus->drv_gmac_cmn.core;
1463 ether_addr_copy(net_dev->dev_addr, bgmac->mac_addr);
1528
1464
1529 switch (core->core_unit) {
1530 case 0:
1531 bgmac->phyaddr = sprom->et0phyaddr;
1532 break;
1533 case 1:
1534 bgmac->phyaddr = sprom->et1phyaddr;
1535 break;
1536 case 2:
1537 bgmac->phyaddr = sprom->et2phyaddr;
1538 break;
1539 }
1540 bgmac->phyaddr &= BGMAC_PHY_MASK;
1541 if (bgmac->phyaddr == BGMAC_PHY_MASK) {
1542 dev_err(bgmac->dev, "No PHY found\n");
1543 err = -ENODEV;
1544 goto err_netdev_free;
1545 }
1546 dev_info(bgmac->dev, "Found PHY addr: %d%s\n", bgmac->phyaddr,
1547 bgmac->phyaddr == BGMAC_PHY_NOREGS ? " (NOREGS)" : "");
1465 /* This (reset &) enable is not preset in specs or reference driver but
1466 * Broadcom does it in arch PCI code when enabling fake PCI device.
1467 */
1468 bgmac_clk_enable(bgmac, 0);
1548
1469
1549 if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) {
1550 dev_err(bgmac->dev, "PCI setup not implemented\n");
1551 err = -ENOTSUPP;
1552 goto err_netdev_free;
1553 }
1554
1555 bgmac_chip_reset(bgmac);
1556
1470 bgmac_chip_reset(bgmac);
1471
1557 /* For Northstar, we have to take all GMAC core out of reset */
1558 if (bgmac_is_bcm4707_family(bgmac)) {
1559 struct bcma_device *ns_core;
1560 int ns_gmac;
1561
1562 /* Northstar has 4 GMAC cores */
1563 for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
1564 /* As Northstar requirement, we have to reset all GMACs
1565 * before accessing one. bgmac_chip_reset() call
1566 * bcma_core_enable() for this core. Then the other
1567 * three GMACs didn't reset. We do it here.
1568 */
1569 ns_core = bcma_find_core_unit(core->bus,
1570 BCMA_CORE_MAC_GBIT,
1571 ns_gmac);
1572 if (ns_core && !bcma_core_is_enabled(ns_core))
1573 bcma_core_enable(ns_core, 0);
1574 }
1575 }
1576
1577 err = bgmac_dma_alloc(bgmac);
1578 if (err) {
1579 dev_err(bgmac->dev, "Unable to alloc memory for DMA\n");
1580 goto err_netdev_free;
1581 }
1582
1583 bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
1584 if (bcm47xx_nvram_getenv("et0_no_txint", NULL, 0) == 0)
1585 bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
1586
1472 err = bgmac_dma_alloc(bgmac);
1473 if (err) {
1474 dev_err(bgmac->dev, "Unable to alloc memory for DMA\n");
1475 goto err_netdev_free;
1476 }
1477
1478 bgmac->int_mask = BGMAC_IS_ERRMASK | BGMAC_IS_RX | BGMAC_IS_TX_MASK;
1479 if (bcm47xx_nvram_getenv("et0_no_txint", NULL, 0) == 0)
1480 bgmac->int_mask &= ~BGMAC_IS_TX_MASK;
1481
1587 bgmac->has_robosw = !!(core->bus->sprom.boardflags_lo &
1588 BGMAC_BFL_ENETROBO);
1589 if (bgmac->has_robosw)
1590 dev_warn(bgmac->dev, "Support for Roboswitch not implemented\n");
1591
1592 if (core->bus->sprom.boardflags_lo & BGMAC_BFL_ENETADM)
1593 dev_warn(bgmac->dev, "Support for ADMtek ethernet switch not implemented\n");
1594
1595 /* Feature Flags */
1596 switch (core->bus->chipinfo.id) {
1597 case BCMA_CHIP_ID_BCM5357:
1598 bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
1599 bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
1600 bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL1;
1601 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_PHY;
1602 if (core->bus->chipinfo.pkg == BCMA_PKG_ID_BCM47186) {
1603 bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
1604 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_RGMII;
1605 }
1606 if (core->bus->chipinfo.pkg == BCMA_PKG_ID_BCM5358)
1607 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_EPHYRMII;
1608 break;
1609 case BCMA_CHIP_ID_BCM53572:
1610 bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
1611 bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
1612 bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL1;
1613 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_PHY;
1614 if (core->bus->chipinfo.pkg == BCMA_PKG_ID_BCM47188) {
1615 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_RGMII;
1616 bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
1617 }
1618 break;
1619 case BCMA_CHIP_ID_BCM4749:
1620 bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
1621 bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
1622 bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL1;
1623 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_PHY;
1624 if (core->bus->chipinfo.pkg == 10) {
1625 bgmac->feature_flags |= BGMAC_FEAT_SW_TYPE_RGMII;
1626 bgmac->feature_flags |= BGMAC_FEAT_IOST_ATTACHED;
1627 }
1628 break;
1629 case BCMA_CHIP_ID_BCM4716:
1630 bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
1631 /* fallthrough */
1632 case BCMA_CHIP_ID_BCM47162:
1633 bgmac->feature_flags |= BGMAC_FEAT_FLW_CTRL2;
1634 bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
1635 break;
1636 /* bcm4707_family */
1637 case BCMA_CHIP_ID_BCM4707:
1638 case BCMA_CHIP_ID_BCM47094:
1639 case BCMA_CHIP_ID_BCM53018:
1640 bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
1641 bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
1642 bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
1643 break;
1644 default:
1645 bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
1646 bgmac->feature_flags |= BGMAC_FEAT_SET_RXQ_CLK;
1647 }
1648
1649 if (!bgmac_is_bcm4707_family(bgmac) && core->id.rev > 2)
1650 bgmac->feature_flags |= BGMAC_FEAT_MISC_PLL_REQ;
1651
1652 if (core->id.id == BCMA_CORE_4706_MAC_GBIT) {
1653 bgmac->feature_flags |= BGMAC_FEAT_CMN_PHY_CTL;
1654 bgmac->feature_flags |= BGMAC_FEAT_NO_CLR_MIB;
1655 }
1656
1657 if (core->id.rev >= 4) {
1658 bgmac->feature_flags |= BGMAC_FEAT_CMDCFG_SR_REV4;
1659 bgmac->feature_flags |= BGMAC_FEAT_TX_MASK_SETUP;
1660 bgmac->feature_flags |= BGMAC_FEAT_RX_MASK_SETUP;
1661 }
1662
1663 netif_napi_add(net_dev, &bgmac->napi, bgmac_poll, BGMAC_WEIGHT);
1664
1482 netif_napi_add(net_dev, &bgmac->napi, bgmac_poll, BGMAC_WEIGHT);
1483
1665 if (!bgmac_is_bcm4707_family(bgmac)) {
1666 struct mii_bus *mii_bus;
1667
1668 mii_bus = bcma_mdio_mii_register(core, bgmac->phyaddr);
1669 if (!IS_ERR(mii_bus)) {
1670 err = PTR_ERR(mii_bus);
1671 goto err_dma_free;
1672 }
1673
1674 bgmac->mii_bus = mii_bus;
1675 }
1676
1677 if (!bgmac->mii_bus)
1678 err = bgmac_phy_connect_direct(bgmac);
1679 else
1680 err = bgmac_phy_connect(bgmac);
1681 if (err) {
1682 dev_err(bgmac->dev, "Cannot connect to phy\n");
1484 if (!bgmac->mii_bus)
1485 err = bgmac_phy_connect_direct(bgmac);
1486 else
1487 err = bgmac_phy_connect(bgmac);
1488 if (err) {
1489 dev_err(bgmac->dev, "Cannot connect to phy\n");
1683 goto err_mii_unregister;
1490 goto err_dma_free;
1684 }
1685
1686 net_dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1687 net_dev->hw_features = net_dev->features;
1688 net_dev->vlan_features = net_dev->features;
1689
1690 err = register_netdev(bgmac->net_dev);
1691 if (err) {
1692 dev_err(bgmac->dev, "Cannot register net device\n");
1693 goto err_phy_disconnect;
1694 }
1695
1696 netif_carrier_off(net_dev);
1697
1698 return 0;
1699
1700err_phy_disconnect:
1701 phy_disconnect(net_dev->phydev);
1491 }
1492
1493 net_dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1494 net_dev->hw_features = net_dev->features;
1495 net_dev->vlan_features = net_dev->features;
1496
1497 err = register_netdev(bgmac->net_dev);
1498 if (err) {
1499 dev_err(bgmac->dev, "Cannot register net device\n");
1500 goto err_phy_disconnect;
1501 }
1502
1503 netif_carrier_off(net_dev);
1504
1505 return 0;
1506
1507err_phy_disconnect:
1508 phy_disconnect(net_dev->phydev);
1702err_mii_unregister:
1703 bcma_mdio_mii_unregister(bgmac->mii_bus);
1704err_dma_free:
1705 bgmac_dma_free(bgmac);
1706err_netdev_free:
1509err_dma_free:
1510 bgmac_dma_free(bgmac);
1511err_netdev_free:
1707 bcma_set_drvdata(core, NULL);
1708 free_netdev(net_dev);
1709
1710 return err;
1711}
1512 free_netdev(net_dev);
1513
1514 return err;
1515}
1516EXPORT_SYMBOL_GPL(bgmac_enet_probe);
1712
1517
1713static void bgmac_remove(struct bcma_device *core)
1518void bgmac_enet_remove(struct bgmac *bgmac)
1714{
1519{
1715 struct bgmac *bgmac = bcma_get_drvdata(core);
1716
1717 unregister_netdev(bgmac->net_dev);
1718 phy_disconnect(bgmac->net_dev->phydev);
1520 unregister_netdev(bgmac->net_dev);
1521 phy_disconnect(bgmac->net_dev->phydev);
1719 bcma_mdio_mii_unregister(bgmac->mii_bus);
1720 netif_napi_del(&bgmac->napi);
1721 bgmac_dma_free(bgmac);
1522 netif_napi_del(&bgmac->napi);
1523 bgmac_dma_free(bgmac);
1722 bcma_set_drvdata(core, NULL);
1723 free_netdev(bgmac->net_dev);
1724}
1524 free_netdev(bgmac->net_dev);
1525}
1526EXPORT_SYMBOL_GPL(bgmac_enet_remove);
1725
1527
1726static struct bcma_driver bgmac_bcma_driver = {
1727 .name = KBUILD_MODNAME,
1728 .id_table = bgmac_bcma_tbl,
1729 .probe = bgmac_probe,
1730 .remove = bgmac_remove,
1731};
1732
1733static int __init bgmac_init(void)
1734{
1735 int err;
1736
1737 err = bcma_driver_register(&bgmac_bcma_driver);
1738 if (err)
1739 return err;
1740 pr_info("Broadcom 47xx GBit MAC driver loaded\n");
1741
1742 return 0;
1743}
1744
1745static void __exit bgmac_exit(void)
1746{
1747 bcma_driver_unregister(&bgmac_bcma_driver);
1748}
1749
1750module_init(bgmac_init)
1751module_exit(bgmac_exit)
1752
1753MODULE_AUTHOR("Rafał Miłecki");
1754MODULE_LICENSE("GPL");
1528MODULE_AUTHOR("Rafał Miłecki");
1529MODULE_LICENSE("GPL");