sja1105.h (611ac726f9ebbb12f2113e5345ef109660954eeb) sja1105.h (0fac6aa098edf91ba65370da03811d9aba5715a9)
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4 */
5#ifndef _SJA1105_H
6#define _SJA1105_H
7
8#include <linux/ptp_clock_kernel.h>

--- 220 unchanged lines hidden (view full) ---

229struct sja1105_bridge_vlan {
230 struct list_head list;
231 int port;
232 u16 vid;
233 bool pvid;
234 bool untagged;
235};
236
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4 */
5#ifndef _SJA1105_H
6#define _SJA1105_H
7
8#include <linux/ptp_clock_kernel.h>

--- 220 unchanged lines hidden (view full) ---

229struct sja1105_bridge_vlan {
230 struct list_head list;
231 int port;
232 u16 vid;
233 bool pvid;
234 bool untagged;
235};
236
237enum sja1105_vlan_state {
238 SJA1105_VLAN_UNAWARE,
239 SJA1105_VLAN_BEST_EFFORT,
240 SJA1105_VLAN_FILTERING_FULL,
241};
242
243struct sja1105_private {
244 struct sja1105_static_config static_config;
245 bool rgmii_rx_delay[SJA1105_MAX_NUM_PORTS];
246 bool rgmii_tx_delay[SJA1105_MAX_NUM_PORTS];
247 phy_interface_t phy_mode[SJA1105_MAX_NUM_PORTS];
248 bool fixed_link[SJA1105_MAX_NUM_PORTS];
237struct sja1105_private {
238 struct sja1105_static_config static_config;
239 bool rgmii_rx_delay[SJA1105_MAX_NUM_PORTS];
240 bool rgmii_tx_delay[SJA1105_MAX_NUM_PORTS];
241 phy_interface_t phy_mode[SJA1105_MAX_NUM_PORTS];
242 bool fixed_link[SJA1105_MAX_NUM_PORTS];
249 bool best_effort_vlan_filtering;
243 bool vlan_aware;
250 unsigned long learn_ena;
251 unsigned long ucast_egress_floods;
252 unsigned long bcast_egress_floods;
253 const struct sja1105_info *info;
254 size_t max_xfer_len;
255 struct gpio_desc *reset_gpio;
256 struct spi_device *spidev;
257 struct dsa_switch *ds;
258 struct list_head dsa_8021q_vlans;
259 struct list_head bridge_vlans;
260 struct sja1105_flow_block flow_block;
261 struct sja1105_port ports[SJA1105_MAX_NUM_PORTS];
262 /* Serializes transmission of management frames so that
263 * the switch doesn't confuse them with one another.
264 */
265 struct mutex mgmt_lock;
266 struct dsa_8021q_context *dsa_8021q_ctx;
244 unsigned long learn_ena;
245 unsigned long ucast_egress_floods;
246 unsigned long bcast_egress_floods;
247 const struct sja1105_info *info;
248 size_t max_xfer_len;
249 struct gpio_desc *reset_gpio;
250 struct spi_device *spidev;
251 struct dsa_switch *ds;
252 struct list_head dsa_8021q_vlans;
253 struct list_head bridge_vlans;
254 struct sja1105_flow_block flow_block;
255 struct sja1105_port ports[SJA1105_MAX_NUM_PORTS];
256 /* Serializes transmission of management frames so that
257 * the switch doesn't confuse them with one another.
258 */
259 struct mutex mgmt_lock;
260 struct dsa_8021q_context *dsa_8021q_ctx;
267 enum sja1105_vlan_state vlan_state;
268 struct devlink_region **regions;
269 struct sja1105_cbs_entry *cbs;
270 struct mii_bus *mdio_base_t1;
271 struct mii_bus *mdio_base_tx;
272 struct mii_bus *mdio_pcs;
273 struct dw_xpcs *xpcs[SJA1105_MAX_NUM_PORTS];
274 struct sja1105_tagger_data tagger_data;
275 struct sja1105_ptp_data ptp_data;

--- 30 unchanged lines hidden (view full) ---

306int sja1105_pcs_mdio_read(struct mii_bus *bus, int phy, int reg);
307int sja1105_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);
308int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg);
309int sja1110_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);
310
311/* From sja1105_devlink.c */
312int sja1105_devlink_setup(struct dsa_switch *ds);
313void sja1105_devlink_teardown(struct dsa_switch *ds);
261 struct devlink_region **regions;
262 struct sja1105_cbs_entry *cbs;
263 struct mii_bus *mdio_base_t1;
264 struct mii_bus *mdio_base_tx;
265 struct mii_bus *mdio_pcs;
266 struct dw_xpcs *xpcs[SJA1105_MAX_NUM_PORTS];
267 struct sja1105_tagger_data tagger_data;
268 struct sja1105_ptp_data ptp_data;

--- 30 unchanged lines hidden (view full) ---

299int sja1105_pcs_mdio_read(struct mii_bus *bus, int phy, int reg);
300int sja1105_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);
301int sja1110_pcs_mdio_read(struct mii_bus *bus, int phy, int reg);
302int sja1110_pcs_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);
303
304/* From sja1105_devlink.c */
305int sja1105_devlink_setup(struct dsa_switch *ds);
306void sja1105_devlink_teardown(struct dsa_switch *ds);
314int sja1105_devlink_param_get(struct dsa_switch *ds, u32 id,
315 struct devlink_param_gset_ctx *ctx);
316int sja1105_devlink_param_set(struct dsa_switch *ds, u32 id,
317 struct devlink_param_gset_ctx *ctx);
318int sja1105_devlink_info_get(struct dsa_switch *ds,
319 struct devlink_info_req *req,
320 struct netlink_ext_ack *extack);
321
322/* From sja1105_spi.c */
323int sja1105_xfer_buf(const struct sja1105_private *priv,
324 sja1105_spi_rw_mode_t rw, u64 reg_addr,
325 u8 *buf, size_t len);

--- 97 unchanged lines hidden --- 		307int sja1105_devlink_info_get(struct dsa_switch *ds,
308 struct devlink_info_req *req,
309 struct netlink_ext_ack *extack);
310
311/* From sja1105_spi.c */
312int sja1105_xfer_buf(const struct sja1105_private *priv,
313 sja1105_spi_rw_mode_t rw, u64 reg_addr,
314 u8 *buf, size_t len);

--- 97 unchanged lines hidden ---