felix.c (f81483aaeb59da530b286fe5d081e1705eb5c886) felix.c (5cad43a52ee3caf451cd645baa4beb53a1733dae)
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright 2019-2021 NXP
3 *
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
7 */
8#include <uapi/linux/if_bridge.h>

--- 7 unchanged lines hidden (view full) ---

16#include <linux/dsa/8021q.h>
17#include <linux/dsa/ocelot.h>
18#include <linux/platform_device.h>
19#include <linux/ptp_classify.h>
20#include <linux/module.h>
21#include <linux/of_net.h>
22#include <linux/pci.h>
23#include <linux/of.h>
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright 2019-2021 NXP
3 *
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
7 */
8#include <uapi/linux/if_bridge.h>

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16#include <linux/dsa/8021q.h>
17#include <linux/dsa/ocelot.h>
18#include <linux/platform_device.h>
19#include <linux/ptp_classify.h>
20#include <linux/module.h>
21#include <linux/of_net.h>
22#include <linux/pci.h>
23#include <linux/of.h>
24#include <linux/pcs-lynx.h>
25#include <net/pkt_sched.h>
26#include <net/dsa.h>
27#include "felix.h"
28
29static int felix_tag_8021q_rxvlan_add(struct felix *felix, int port, u16 vid,
30 bool pvid, bool untagged)
31{
32 struct ocelot_vcap_filter *outer_tagging_rule;

--- 202 unchanged lines hidden (view full) ---

235 * connected internally to the enetc or fman DSA master can be configured to
236 * use the software-defined tag_8021q frame format. As far as the hardware is
237 * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
238 * module are now disconnected from it, but can still be accessed through
239 * register-based MMIO.
240 */
241static void felix_8021q_cpu_port_init(struct ocelot *ocelot, int port)
242{
24#include <net/pkt_sched.h>
25#include <net/dsa.h>
26#include "felix.h"
27
28static int felix_tag_8021q_rxvlan_add(struct felix *felix, int port, u16 vid,
29 bool pvid, bool untagged)
30{
31 struct ocelot_vcap_filter *outer_tagging_rule;

--- 202 unchanged lines hidden (view full) ---

234 * connected internally to the enetc or fman DSA master can be configured to
235 * use the software-defined tag_8021q frame format. As far as the hardware is
236 * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
237 * module are now disconnected from it, but can still be accessed through
238 * register-based MMIO.
239 */
240static void felix_8021q_cpu_port_init(struct ocelot *ocelot, int port)
241{
242 mutex_lock(&ocelot->fwd_domain_lock);
243
243 ocelot->ports[port]->is_dsa_8021q_cpu = true;
244 ocelot->npi = -1;
245
246 /* Overwrite PGID_CPU with the non-tagging port */
247 ocelot_write_rix(ocelot, BIT(port), ANA_PGID_PGID, PGID_CPU);
248
244 ocelot->ports[port]->is_dsa_8021q_cpu = true;
245 ocelot->npi = -1;
246
247 /* Overwrite PGID_CPU with the non-tagging port */
248 ocelot_write_rix(ocelot, BIT(port), ANA_PGID_PGID, PGID_CPU);
249
249 ocelot_apply_bridge_fwd_mask(ocelot);
250 ocelot_apply_bridge_fwd_mask(ocelot, true);
251
252 mutex_unlock(&ocelot->fwd_domain_lock);
250}
251
252static void felix_8021q_cpu_port_deinit(struct ocelot *ocelot, int port)
253{
253}
254
255static void felix_8021q_cpu_port_deinit(struct ocelot *ocelot, int port)
256{
257 mutex_lock(&ocelot->fwd_domain_lock);
258
254 ocelot->ports[port]->is_dsa_8021q_cpu = false;
255
256 /* Restore PGID_CPU */
257 ocelot_write_rix(ocelot, BIT(ocelot->num_phys_ports), ANA_PGID_PGID,
258 PGID_CPU);
259
259 ocelot->ports[port]->is_dsa_8021q_cpu = false;
260
261 /* Restore PGID_CPU */
262 ocelot_write_rix(ocelot, BIT(ocelot->num_phys_ports), ANA_PGID_PGID,
263 PGID_CPU);
264
260 ocelot_apply_bridge_fwd_mask(ocelot);
265 ocelot_apply_bridge_fwd_mask(ocelot, true);
266
267 mutex_unlock(&ocelot->fwd_domain_lock);
261}
262
263/* Set up a VCAP IS2 rule for delivering PTP frames to the CPU port module.
264 * If the quirk_no_xtr_irq is in place, then also copy those PTP frames to the
265 * tag_8021q CPU port.
266 */
267static int felix_setup_mmio_filtering(struct felix *felix)
268{

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285
286 for (port = 0; port < ocelot->num_phys_ports; port++) {
287 if (dsa_is_cpu_port(ds, port)) {
288 cpu = port;
289 break;
290 }
291 }
292
268}
269
270/* Set up a VCAP IS2 rule for delivering PTP frames to the CPU port module.
271 * If the quirk_no_xtr_irq is in place, then also copy those PTP frames to the
272 * tag_8021q CPU port.
273 */
274static int felix_setup_mmio_filtering(struct felix *felix)
275{

--- 16 unchanged lines hidden (view full) ---

292
293 for (port = 0; port < ocelot->num_phys_ports; port++) {
294 if (dsa_is_cpu_port(ds, port)) {
295 cpu = port;
296 break;
297 }
298 }
299
293 if (cpu < 0)
300 if (cpu < 0) {
301 kfree(tagging_rule);
302 kfree(redirect_rule);
294 return -EINVAL;
303 return -EINVAL;
304 }
295
296 tagging_rule->key_type = OCELOT_VCAP_KEY_ETYPE;
297 *(__be16 *)tagging_rule->key.etype.etype.value = htons(ETH_P_1588);
298 *(__be16 *)tagging_rule->key.etype.etype.mask = htons(0xffff);
299 tagging_rule->ingress_port_mask = user_ports;
300 tagging_rule->prio = 1;
301 tagging_rule->id.cookie = ocelot->num_phys_ports;
302 tagging_rule->id.tc_offload = false;

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624{
625 struct ocelot *ocelot = ds->priv;
626
627 ocelot_set_ageing_time(ocelot, ageing_time);
628
629 return 0;
630}
631
305
306 tagging_rule->key_type = OCELOT_VCAP_KEY_ETYPE;
307 *(__be16 *)tagging_rule->key.etype.etype.value = htons(ETH_P_1588);
308 *(__be16 *)tagging_rule->key.etype.etype.mask = htons(0xffff);
309 tagging_rule->ingress_port_mask = user_ports;
310 tagging_rule->prio = 1;
311 tagging_rule->id.cookie = ocelot->num_phys_ports;
312 tagging_rule->id.tc_offload = false;

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634{
635 struct ocelot *ocelot = ds->priv;
636
637 ocelot_set_ageing_time(ocelot, ageing_time);
638
639 return 0;
640}
641
642static void felix_port_fast_age(struct dsa_switch *ds, int port)
643{
644 struct ocelot *ocelot = ds->priv;
645 int err;
646
647 err = ocelot_mact_flush(ocelot, port);
648 if (err)
649 dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
650 port, ERR_PTR(err));
651}
652
632static int felix_fdb_dump(struct dsa_switch *ds, int port,
633 dsa_fdb_dump_cb_t *cb, void *data)
634{
635 struct ocelot *ocelot = ds->priv;
636
637 return ocelot_fdb_dump(ocelot, port, cb, data);
638}
639

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693 struct ocelot *ocelot = ds->priv;
694
695 ocelot_port_bridge_flags(ocelot, port, val);
696
697 return 0;
698}
699
700static int felix_bridge_join(struct dsa_switch *ds, int port,
653static int felix_fdb_dump(struct dsa_switch *ds, int port,
654 dsa_fdb_dump_cb_t *cb, void *data)
655{
656 struct ocelot *ocelot = ds->priv;
657
658 return ocelot_fdb_dump(ocelot, port, cb, data);
659}
660

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714 struct ocelot *ocelot = ds->priv;
715
716 ocelot_port_bridge_flags(ocelot, port, val);
717
718 return 0;
719}
720
721static int felix_bridge_join(struct dsa_switch *ds, int port,
701 struct net_device *br)
722 struct dsa_bridge bridge, bool *tx_fwd_offload)
702{
703 struct ocelot *ocelot = ds->priv;
704
723{
724 struct ocelot *ocelot = ds->priv;
725
705 ocelot_port_bridge_join(ocelot, port, br);
726 ocelot_port_bridge_join(ocelot, port, bridge.dev);
706
707 return 0;
708}
709
710static void felix_bridge_leave(struct dsa_switch *ds, int port,
727
728 return 0;
729}
730
731static void felix_bridge_leave(struct dsa_switch *ds, int port,
711 struct net_device *br)
732 struct dsa_bridge bridge)
712{
713 struct ocelot *ocelot = ds->priv;
714
733{
734 struct ocelot *ocelot = ds->priv;
735
715 ocelot_port_bridge_leave(ocelot, port, br);
736 ocelot_port_bridge_leave(ocelot, port, bridge.dev);
716}
717
718static int felix_lag_join(struct dsa_switch *ds, int port,
719 struct net_device *bond,
720 struct netdev_lag_upper_info *info)
721{
722 struct ocelot *ocelot = ds->priv;
723

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815static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
816 unsigned int link_an_mode,
817 const struct phylink_link_state *state)
818{
819 struct ocelot *ocelot = ds->priv;
820 struct felix *felix = ocelot_to_felix(ocelot);
821 struct dsa_port *dp = dsa_to_port(ds, port);
822
737}
738
739static int felix_lag_join(struct dsa_switch *ds, int port,
740 struct net_device *bond,
741 struct netdev_lag_upper_info *info)
742{
743 struct ocelot *ocelot = ds->priv;
744

--- 91 unchanged lines hidden (view full) ---

836static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
837 unsigned int link_an_mode,
838 const struct phylink_link_state *state)
839{
840 struct ocelot *ocelot = ds->priv;
841 struct felix *felix = ocelot_to_felix(ocelot);
842 struct dsa_port *dp = dsa_to_port(ds, port);
843
823 if (felix->pcs[port])
824 phylink_set_pcs(dp->pl, &felix->pcs[port]->pcs);
844 if (felix->pcs && felix->pcs[port])
845 phylink_set_pcs(dp->pl, felix->pcs[port]);
825}
826
827static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
828 unsigned int link_an_mode,
829 phy_interface_t interface)
830{
831 struct ocelot *ocelot = ds->priv;
832

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984 if (!ocelot->ports)
985 return -ENOMEM;
986
987 ocelot->map = felix->info->map;
988 ocelot->stats_layout = felix->info->stats_layout;
989 ocelot->num_stats = felix->info->num_stats;
990 ocelot->num_mact_rows = felix->info->num_mact_rows;
991 ocelot->vcap = felix->info->vcap;
846}
847
848static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
849 unsigned int link_an_mode,
850 phy_interface_t interface)
851{
852 struct ocelot *ocelot = ds->priv;
853

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1005 if (!ocelot->ports)
1006 return -ENOMEM;
1007
1008 ocelot->map = felix->info->map;
1009 ocelot->stats_layout = felix->info->stats_layout;
1010 ocelot->num_stats = felix->info->num_stats;
1011 ocelot->num_mact_rows = felix->info->num_mact_rows;
1012 ocelot->vcap = felix->info->vcap;
1013 ocelot->vcap_pol.base = felix->info->vcap_pol_base;
1014 ocelot->vcap_pol.max = felix->info->vcap_pol_max;
1015 ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
1016 ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
992 ocelot->ops = felix->info->ops;
993 ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
994 ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
995 ocelot->devlink = felix->ds->devlink;
996
997 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
998 GFP_KERNEL);
999 if (!port_phy_modes)

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1011 if (!felix->info->target_io_res[i].name)
1012 continue;
1013
1014 memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
1015 res.flags = IORESOURCE_MEM;
1016 res.start += felix->switch_base;
1017 res.end += felix->switch_base;
1018
1017 ocelot->ops = felix->info->ops;
1018 ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
1019 ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
1020 ocelot->devlink = felix->ds->devlink;
1021
1022 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
1023 GFP_KERNEL);
1024 if (!port_phy_modes)

--- 11 unchanged lines hidden (view full) ---

1036 if (!felix->info->target_io_res[i].name)
1037 continue;
1038
1039 memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
1040 res.flags = IORESOURCE_MEM;
1041 res.start += felix->switch_base;
1042 res.end += felix->switch_base;
1043
1019 target = ocelot_regmap_init(ocelot, &res);
1044 target = felix->info->init_regmap(ocelot, &res);
1020 if (IS_ERR(target)) {
1021 dev_err(ocelot->dev,
1022 "Failed to map device memory space\n");
1023 kfree(port_phy_modes);
1024 return PTR_ERR(target);
1025 }
1026
1027 ocelot->targets[i] = target;

--- 20 unchanged lines hidden (view full) ---

1048 return -ENOMEM;
1049 }
1050
1051 memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
1052 res.flags = IORESOURCE_MEM;
1053 res.start += felix->switch_base;
1054 res.end += felix->switch_base;
1055
1045 if (IS_ERR(target)) {
1046 dev_err(ocelot->dev,
1047 "Failed to map device memory space\n");
1048 kfree(port_phy_modes);
1049 return PTR_ERR(target);
1050 }
1051
1052 ocelot->targets[i] = target;

--- 20 unchanged lines hidden (view full) ---

1073 return -ENOMEM;
1074 }
1075
1076 memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
1077 res.flags = IORESOURCE_MEM;
1078 res.start += felix->switch_base;
1079 res.end += felix->switch_base;
1080
1056 target = ocelot_regmap_init(ocelot, &res);
1081 target = felix->info->init_regmap(ocelot, &res);
1057 if (IS_ERR(target)) {
1058 dev_err(ocelot->dev,
1059 "Failed to map memory space for port %d\n",
1060 port);
1061 kfree(port_phy_modes);
1062 return PTR_ERR(target);
1063 }
1064

--- 70 unchanged lines hidden (view full) ---

1135 }
1136
1137 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1138
1139 consume_skb(skb);
1140 kfree(xmit_work);
1141}
1142
1082 if (IS_ERR(target)) {
1083 dev_err(ocelot->dev,
1084 "Failed to map memory space for port %d\n",
1085 port);
1086 kfree(port_phy_modes);
1087 return PTR_ERR(target);
1088 }
1089

--- 70 unchanged lines hidden (view full) ---

1160 }
1161
1162 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1163
1164 consume_skb(skb);
1165 kfree(xmit_work);
1166}
1167
1143static int felix_port_setup_tagger_data(struct dsa_switch *ds, int port)
1168static int felix_connect_tag_protocol(struct dsa_switch *ds,
1169 enum dsa_tag_protocol proto)
1144{
1170{
1145 struct dsa_port *dp = dsa_to_port(ds, port);
1146 struct ocelot *ocelot = ds->priv;
1147 struct felix *felix = ocelot_to_felix(ocelot);
1148 struct felix_port *felix_port;
1171 struct ocelot_8021q_tagger_data *tagger_data;
1149
1172
1150 if (!dsa_port_is_user(dp))
1173 switch (proto) {
1174 case DSA_TAG_PROTO_OCELOT_8021Q:
1175 tagger_data = ocelot_8021q_tagger_data(ds);
1176 tagger_data->xmit_work_fn = felix_port_deferred_xmit;
1151 return 0;
1177 return 0;
1152
1153 felix_port = kzalloc(sizeof(*felix_port), GFP_KERNEL);
1154 if (!felix_port)
1155 return -ENOMEM;
1156
1157 felix_port->xmit_worker = felix->xmit_worker;
1158 felix_port->xmit_work_fn = felix_port_deferred_xmit;
1159
1160 dp->priv = felix_port;
1161
1162 return 0;
1178 case DSA_TAG_PROTO_OCELOT:
1179 case DSA_TAG_PROTO_SEVILLE:
1180 return 0;
1181 default:
1182 return -EPROTONOSUPPORT;
1183 }
1163}
1164
1184}
1185
1165static void felix_port_teardown_tagger_data(struct dsa_switch *ds, int port)
1166{
1167 struct dsa_port *dp = dsa_to_port(ds, port);
1168 struct felix_port *felix_port = dp->priv;
1169
1170 if (!felix_port)
1171 return;
1172
1173 dp->priv = NULL;
1174 kfree(felix_port);
1175}
1176
1177/* Hardware initialization done here so that we can allocate structures with
1178 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
1179 * us to allocate structures twice (leak memory) and map PCI memory twice
1180 * (which will not work).
1181 */
1182static int felix_setup(struct dsa_switch *ds)
1183{
1184 struct ocelot *ocelot = ds->priv;

--- 12 unchanged lines hidden (view full) ---

1197 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1198 if (err) {
1199 dev_err(ocelot->dev,
1200 "Timestamp initialization failed\n");
1201 ocelot->ptp = 0;
1202 }
1203 }
1204
1186/* Hardware initialization done here so that we can allocate structures with
1187 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
1188 * us to allocate structures twice (leak memory) and map PCI memory twice
1189 * (which will not work).
1190 */
1191static int felix_setup(struct dsa_switch *ds)
1192{
1193 struct ocelot *ocelot = ds->priv;

--- 12 unchanged lines hidden (view full) ---

1206 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1207 if (err) {
1208 dev_err(ocelot->dev,
1209 "Timestamp initialization failed\n");
1210 ocelot->ptp = 0;
1211 }
1212 }
1213
1205 felix->xmit_worker = kthread_create_worker(0, "felix_xmit");
1206 if (IS_ERR(felix->xmit_worker)) {
1207 err = PTR_ERR(felix->xmit_worker);
1208 goto out_deinit_timestamp;
1209 }
1210
1211 for (port = 0; port < ds->num_ports; port++) {
1212 if (dsa_is_unused_port(ds, port))
1213 continue;
1214
1215 ocelot_init_port(ocelot, port);
1216
1217 /* Set the default QoS Classification based on PCP and DEI
1218 * bits of vlan tag.
1219 */
1220 felix_port_qos_map_init(ocelot, port);
1214 for (port = 0; port < ds->num_ports; port++) {
1215 if (dsa_is_unused_port(ds, port))
1216 continue;
1217
1218 ocelot_init_port(ocelot, port);
1219
1220 /* Set the default QoS Classification based on PCP and DEI
1221 * bits of vlan tag.
1222 */
1223 felix_port_qos_map_init(ocelot, port);
1221
1222 err = felix_port_setup_tagger_data(ds, port);
1223 if (err) {
1224 dev_err(ds->dev,
1225 "port %d failed to set up tagger data: %pe\n",
1226 port, ERR_PTR(err));
1227 goto out_deinit_ports;
1228 }
1229 }
1230
1231 err = ocelot_devlink_sb_register(ocelot);
1232 if (err)
1233 goto out_deinit_ports;
1234
1235 for (port = 0; port < ds->num_ports; port++) {
1236 if (!dsa_is_cpu_port(ds, port))

--- 11 unchanged lines hidden (view full) ---

1248
1249 return 0;
1250
1251out_deinit_ports:
1252 for (port = 0; port < ocelot->num_phys_ports; port++) {
1253 if (dsa_is_unused_port(ds, port))
1254 continue;
1255
1224 }
1225
1226 err = ocelot_devlink_sb_register(ocelot);
1227 if (err)
1228 goto out_deinit_ports;
1229
1230 for (port = 0; port < ds->num_ports; port++) {
1231 if (!dsa_is_cpu_port(ds, port))

--- 11 unchanged lines hidden (view full) ---

1243
1244 return 0;
1245
1246out_deinit_ports:
1247 for (port = 0; port < ocelot->num_phys_ports; port++) {
1248 if (dsa_is_unused_port(ds, port))
1249 continue;
1250
1256 felix_port_teardown_tagger_data(ds, port);
1257 ocelot_deinit_port(ocelot, port);
1258 }
1259
1251 ocelot_deinit_port(ocelot, port);
1252 }
1253
1260 kthread_destroy_worker(felix->xmit_worker);
1261
1262out_deinit_timestamp:
1263 ocelot_deinit_timestamp(ocelot);
1264 ocelot_deinit(ocelot);
1265
1266out_mdiobus_free:
1267 if (felix->info->mdio_bus_free)
1268 felix->info->mdio_bus_free(ocelot);
1269
1270 return err;

--- 12 unchanged lines hidden (view full) ---

1283 felix_del_tag_protocol(ds, port, felix->tag_proto);
1284 break;
1285 }
1286
1287 for (port = 0; port < ocelot->num_phys_ports; port++) {
1288 if (dsa_is_unused_port(ds, port))
1289 continue;
1290
1254 ocelot_deinit_timestamp(ocelot);
1255 ocelot_deinit(ocelot);
1256
1257out_mdiobus_free:
1258 if (felix->info->mdio_bus_free)
1259 felix->info->mdio_bus_free(ocelot);
1260
1261 return err;

--- 12 unchanged lines hidden (view full) ---

1274 felix_del_tag_protocol(ds, port, felix->tag_proto);
1275 break;
1276 }
1277
1278 for (port = 0; port < ocelot->num_phys_ports; port++) {
1279 if (dsa_is_unused_port(ds, port))
1280 continue;
1281
1291 felix_port_teardown_tagger_data(ds, port);
1292 ocelot_deinit_port(ocelot, port);
1293 }
1294
1282 ocelot_deinit_port(ocelot, port);
1283 }
1284
1295 kthread_destroy_worker(felix->xmit_worker);
1296
1297 ocelot_devlink_sb_unregister(ocelot);
1298 ocelot_deinit_timestamp(ocelot);
1299 ocelot_deinit(ocelot);
1300
1301 if (felix->info->mdio_bus_free)
1302 felix->info->mdio_bus_free(ocelot);
1303}
1304

--- 323 unchanged lines hidden (view full) ---

1628 struct ocelot *ocelot = ds->priv;
1629
1630 return ocelot_mrp_del_ring_role(ocelot, port, mrp);
1631}
1632
1633const struct dsa_switch_ops felix_switch_ops = {
1634 .get_tag_protocol = felix_get_tag_protocol,
1635 .change_tag_protocol = felix_change_tag_protocol,
1285 ocelot_devlink_sb_unregister(ocelot);
1286 ocelot_deinit_timestamp(ocelot);
1287 ocelot_deinit(ocelot);
1288
1289 if (felix->info->mdio_bus_free)
1290 felix->info->mdio_bus_free(ocelot);
1291}
1292

--- 323 unchanged lines hidden (view full) ---

1616 struct ocelot *ocelot = ds->priv;
1617
1618 return ocelot_mrp_del_ring_role(ocelot, port, mrp);
1619}
1620
1621const struct dsa_switch_ops felix_switch_ops = {
1622 .get_tag_protocol = felix_get_tag_protocol,
1623 .change_tag_protocol = felix_change_tag_protocol,
1624 .connect_tag_protocol = felix_connect_tag_protocol,
1636 .setup = felix_setup,
1637 .teardown = felix_teardown,
1638 .set_ageing_time = felix_set_ageing_time,
1639 .get_strings = felix_get_strings,
1640 .get_ethtool_stats = felix_get_ethtool_stats,
1641 .get_sset_count = felix_get_sset_count,
1642 .get_ts_info = felix_get_ts_info,
1643 .phylink_validate = felix_phylink_validate,
1644 .phylink_mac_config = felix_phylink_mac_config,
1645 .phylink_mac_link_down = felix_phylink_mac_link_down,
1646 .phylink_mac_link_up = felix_phylink_mac_link_up,
1625 .setup = felix_setup,
1626 .teardown = felix_teardown,
1627 .set_ageing_time = felix_set_ageing_time,
1628 .get_strings = felix_get_strings,
1629 .get_ethtool_stats = felix_get_ethtool_stats,
1630 .get_sset_count = felix_get_sset_count,
1631 .get_ts_info = felix_get_ts_info,
1632 .phylink_validate = felix_phylink_validate,
1633 .phylink_mac_config = felix_phylink_mac_config,
1634 .phylink_mac_link_down = felix_phylink_mac_link_down,
1635 .phylink_mac_link_up = felix_phylink_mac_link_up,
1636 .port_fast_age = felix_port_fast_age,
1647 .port_fdb_dump = felix_fdb_dump,
1648 .port_fdb_add = felix_fdb_add,
1649 .port_fdb_del = felix_fdb_del,
1650 .port_mdb_add = felix_mdb_add,
1651 .port_mdb_del = felix_mdb_del,
1652 .port_pre_bridge_flags = felix_pre_bridge_flags,
1653 .port_bridge_flags = felix_bridge_flags,
1654 .port_bridge_join = felix_bridge_join,

--- 59 unchanged lines hidden --- 		1637 .port_fdb_dump = felix_fdb_dump,
1638 .port_fdb_add = felix_fdb_add,
1639 .port_fdb_del = felix_fdb_del,
1640 .port_mdb_add = felix_mdb_add,
1641 .port_mdb_del = felix_mdb_del,
1642 .port_pre_bridge_flags = felix_pre_bridge_flags,
1643 .port_bridge_flags = felix_bridge_flags,
1644 .port_bridge_join = felix_bridge_join,

--- 59 unchanged lines hidden ---