felix.c (542898c5aa5c6a3179dffb1d1606884a63f75fed) felix.c (c518afec288351347dbe05ea3d49d18fb9a9fff1)
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright 2019-2021 NXP
3 *
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
7 */
8#include <uapi/linux/if_bridge.h>

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45
46 outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
47 GFP_KERNEL);
48 if (!outer_tagging_rule)
49 return -ENOMEM;
50
51 outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
52 outer_tagging_rule->prio = 1;
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright 2019-2021 NXP
3 *
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
7 */
8#include <uapi/linux/if_bridge.h>

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45
46 outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
47 GFP_KERNEL);
48 if (!outer_tagging_rule)
49 return -ENOMEM;
50
51 outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
52 outer_tagging_rule->prio = 1;
53 outer_tagging_rule->id.cookie = port;
53 outer_tagging_rule->id.cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port);
54 outer_tagging_rule->id.tc_offload = false;
55 outer_tagging_rule->block_id = VCAP_ES0;
56 outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
57 outer_tagging_rule->lookup = 0;
58 outer_tagging_rule->ingress_port.value = port;
59 outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
60 outer_tagging_rule->egress_port.value = upstream;
61 outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);

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98
99 upstream = dsa_upstream_port(ds, port);
100
101 untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
102 untagging_rule->ingress_port_mask = BIT(upstream);
103 untagging_rule->vlan.vid.value = vid;
104 untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
105 untagging_rule->prio = 1;
54 outer_tagging_rule->id.tc_offload = false;
55 outer_tagging_rule->block_id = VCAP_ES0;
56 outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
57 outer_tagging_rule->lookup = 0;
58 outer_tagging_rule->ingress_port.value = port;
59 outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
60 outer_tagging_rule->egress_port.value = upstream;
61 outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);

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98
99 upstream = dsa_upstream_port(ds, port);
100
101 untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
102 untagging_rule->ingress_port_mask = BIT(upstream);
103 untagging_rule->vlan.vid.value = vid;
104 untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
105 untagging_rule->prio = 1;
106 untagging_rule->id.cookie = port;
106 untagging_rule->id.cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
107 untagging_rule->id.tc_offload = false;
108 untagging_rule->block_id = VCAP_IS1;
109 untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
110 untagging_rule->lookup = 0;
111 untagging_rule->action.vlan_pop_cnt_ena = true;
112 untagging_rule->action.vlan_pop_cnt = 1;
113 untagging_rule->action.pag_override_mask = 0xff;
114 untagging_rule->action.pag_val = port;

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119 kfree(redirect_rule);
120 return err;
121 }
122
123 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
124 redirect_rule->ingress_port_mask = BIT(upstream);
125 redirect_rule->pag = port;
126 redirect_rule->prio = 1;
107 untagging_rule->id.tc_offload = false;
108 untagging_rule->block_id = VCAP_IS1;
109 untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
110 untagging_rule->lookup = 0;
111 untagging_rule->action.vlan_pop_cnt_ena = true;
112 untagging_rule->action.vlan_pop_cnt = 1;
113 untagging_rule->action.pag_override_mask = 0xff;
114 untagging_rule->action.pag_val = port;

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119 kfree(redirect_rule);
120 return err;
121 }
122
123 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
124 redirect_rule->ingress_port_mask = BIT(upstream);
125 redirect_rule->pag = port;
126 redirect_rule->prio = 1;
127 redirect_rule->id.cookie = port;
127 redirect_rule->id.cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
128 redirect_rule->id.tc_offload = false;
129 redirect_rule->block_id = VCAP_IS2;
130 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
131 redirect_rule->lookup = 0;
132 redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
133 redirect_rule->action.port_mask = BIT(port);
134
135 err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);

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303 return -EINVAL;
304 }
305
306 tagging_rule->key_type = OCELOT_VCAP_KEY_ETYPE;
307 *(__be16 *)tagging_rule->key.etype.etype.value = htons(ETH_P_1588);
308 *(__be16 *)tagging_rule->key.etype.etype.mask = htons(0xffff);
309 tagging_rule->ingress_port_mask = user_ports;
310 tagging_rule->prio = 1;
128 redirect_rule->id.tc_offload = false;
129 redirect_rule->block_id = VCAP_IS2;
130 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
131 redirect_rule->lookup = 0;
132 redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
133 redirect_rule->action.port_mask = BIT(port);
134
135 err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);

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303 return -EINVAL;
304 }
305
306 tagging_rule->key_type = OCELOT_VCAP_KEY_ETYPE;
307 *(__be16 *)tagging_rule->key.etype.etype.value = htons(ETH_P_1588);
308 *(__be16 *)tagging_rule->key.etype.etype.mask = htons(0xffff);
309 tagging_rule->ingress_port_mask = user_ports;
310 tagging_rule->prio = 1;
311 tagging_rule->id.cookie = ocelot->num_phys_ports;
311 tagging_rule->id.cookie = OCELOT_VCAP_IS1_TAG_8021Q_PTP_MMIO(ocelot);
312 tagging_rule->id.tc_offload = false;
313 tagging_rule->block_id = VCAP_IS1;
314 tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
315 tagging_rule->lookup = 0;
316 tagging_rule->action.pag_override_mask = 0xff;
317 tagging_rule->action.pag_val = ocelot->num_phys_ports;
318
319 ret = ocelot_vcap_filter_add(ocelot, tagging_rule, NULL);
320 if (ret) {
321 kfree(tagging_rule);
322 kfree(redirect_rule);
323 return ret;
324 }
325
326 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
327 redirect_rule->ingress_port_mask = user_ports;
328 redirect_rule->pag = ocelot->num_phys_ports;
329 redirect_rule->prio = 1;
312 tagging_rule->id.tc_offload = false;
313 tagging_rule->block_id = VCAP_IS1;
314 tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
315 tagging_rule->lookup = 0;
316 tagging_rule->action.pag_override_mask = 0xff;
317 tagging_rule->action.pag_val = ocelot->num_phys_ports;
318
319 ret = ocelot_vcap_filter_add(ocelot, tagging_rule, NULL);
320 if (ret) {
321 kfree(tagging_rule);
322 kfree(redirect_rule);
323 return ret;
324 }
325
326 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
327 redirect_rule->ingress_port_mask = user_ports;
328 redirect_rule->pag = ocelot->num_phys_ports;
329 redirect_rule->prio = 1;
330 redirect_rule->id.cookie = ocelot->num_phys_ports;
330 redirect_rule->id.cookie = OCELOT_VCAP_IS2_TAG_8021Q_PTP_MMIO(ocelot);
331 redirect_rule->id.tc_offload = false;
332 redirect_rule->block_id = VCAP_IS2;
333 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
334 redirect_rule->lookup = 0;
335 redirect_rule->action.cpu_copy_ena = true;
336 if (felix->info->quirk_no_xtr_irq) {
337 /* Redirect to the tag_8021q CPU but also copy PTP packets to
338 * the CPU port module

--- 1365 unchanged lines hidden --- 		331 redirect_rule->id.tc_offload = false;
332 redirect_rule->block_id = VCAP_IS2;
333 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
334 redirect_rule->lookup = 0;
335 redirect_rule->action.cpu_copy_ena = true;
336 if (felix->info->quirk_no_xtr_irq) {
337 /* Redirect to the tag_8021q CPU but also copy PTP packets to
338 * the CPU port module

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