chip.c (121b8fe2fdc931a60f7437a94db3b8af8c62ee54) chip.c (7150961487c5b4521ef5b6557373546e370709d2)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Marvell 88e6xxx Ethernet switch single-chip support
4 *
5 * Copyright (c) 2008 Marvell Semiconductor
6 *
7 * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch>
8 *

--- 3524 unchanged lines hidden (view full) ---

3533 .set_cpu_port = mv88e6095_g1_set_cpu_port,
3534 .set_egress_port = mv88e6095_g1_set_egress_port,
3535 .watchdog_ops = &mv88e6250_watchdog_ops,
3536 .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
3537 .pot_clear = mv88e6xxx_g2_pot_clear,
3538 .reset = mv88e6250_g1_reset,
3539 .vtu_getnext = mv88e6250_g1_vtu_getnext,
3540 .vtu_loadpurge = mv88e6250_g1_vtu_loadpurge,
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Marvell 88e6xxx Ethernet switch single-chip support
4 *
5 * Copyright (c) 2008 Marvell Semiconductor
6 *
7 * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch>
8 *

--- 3524 unchanged lines hidden (view full) ---

3533 .set_cpu_port = mv88e6095_g1_set_cpu_port,
3534 .set_egress_port = mv88e6095_g1_set_egress_port,
3535 .watchdog_ops = &mv88e6250_watchdog_ops,
3536 .mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
3537 .pot_clear = mv88e6xxx_g2_pot_clear,
3538 .reset = mv88e6250_g1_reset,
3539 .vtu_getnext = mv88e6250_g1_vtu_getnext,
3540 .vtu_loadpurge = mv88e6250_g1_vtu_loadpurge,
3541 .avb_ops = &mv88e6352_avb_ops,
3542 .ptp_ops = &mv88e6250_ptp_ops,
3541 .phylink_validate = mv88e6065_phylink_validate,
3542};
3543
3544static const struct mv88e6xxx_ops mv88e6290_ops = {
3545 /* MV88E6XXX_FAMILY_6390 */
3546 .setup_errata = mv88e6390_setup_errata,
3547 .irl_init_all = mv88e6390_g2_irl_init_all,
3548 .get_eeprom = mv88e6xxx_g2_get_eeprom8,

--- 780 unchanged lines hidden (view full) ---

4329 .global1_addr = 0x0f,
4330 .global2_addr = 0x07,
4331 .age_time_coeff = 15000,
4332 .g1_irqs = 9,
4333 .g2_irqs = 10,
4334 .atu_move_port_mask = 0xf,
4335 .dual_chip = true,
4336 .tag_protocol = DSA_TAG_PROTO_DSA,
3543 .phylink_validate = mv88e6065_phylink_validate,
3544};
3545
3546static const struct mv88e6xxx_ops mv88e6290_ops = {
3547 /* MV88E6XXX_FAMILY_6390 */
3548 .setup_errata = mv88e6390_setup_errata,
3549 .irl_init_all = mv88e6390_g2_irl_init_all,
3550 .get_eeprom = mv88e6xxx_g2_get_eeprom8,

--- 780 unchanged lines hidden (view full) ---

4331 .global1_addr = 0x0f,
4332 .global2_addr = 0x07,
4333 .age_time_coeff = 15000,
4334 .g1_irqs = 9,
4335 .g2_irqs = 10,
4336 .atu_move_port_mask = 0xf,
4337 .dual_chip = true,
4338 .tag_protocol = DSA_TAG_PROTO_DSA,
4339 .ptp_support = true,
4337 .ops = &mv88e6250_ops,
4338 },
4339
4340 [MV88E6240] = {
4341 .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6240,
4342 .family = MV88E6XXX_FAMILY_6352,
4343 .name = "Marvell 88E6240",
4344 .num_databases = 4096,

--- 29 unchanged lines hidden (view full) ---

4374 .global1_addr = 0x0f,
4375 .global2_addr = 0x07,
4376 .age_time_coeff = 15000,
4377 .g1_irqs = 9,
4378 .g2_irqs = 10,
4379 .atu_move_port_mask = 0xf,
4380 .dual_chip = true,
4381 .tag_protocol = DSA_TAG_PROTO_DSA,
4340 .ops = &mv88e6250_ops,
4341 },
4342
4343 [MV88E6240] = {
4344 .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6240,
4345 .family = MV88E6XXX_FAMILY_6352,
4346 .name = "Marvell 88E6240",
4347 .num_databases = 4096,

--- 29 unchanged lines hidden (view full) ---

4377 .global1_addr = 0x0f,
4378 .global2_addr = 0x07,
4379 .age_time_coeff = 15000,
4380 .g1_irqs = 9,
4381 .g2_irqs = 10,
4382 .atu_move_port_mask = 0xf,
4383 .dual_chip = true,
4384 .tag_protocol = DSA_TAG_PROTO_DSA,
4385 .ptp_support = true,
4382 .ops = &mv88e6250_ops,
4383 },
4384
4385 [MV88E6290] = {
4386 .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6290,
4387 .family = MV88E6XXX_FAMILY_6390,
4388 .name = "Marvell 88E6290",
4389 .num_databases = 4096,

--- 629 unchanged lines hidden --- 		4386 .ops = &mv88e6250_ops,
4387 },
4388
4389 [MV88E6290] = {
4390 .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6290,
4391 .family = MV88E6XXX_FAMILY_6390,
4392 .name = "Marvell 88E6290",
4393 .num_databases = 4096,

--- 629 unchanged lines hidden ---