ksz8795.c (a30bf805592ed56af7a9482b4339d9c9bb092784) ksz8795.c (462d525018f068338a4d0b571aa515e26a8320e7)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Microchip KSZ8795 switch driver
4 *
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
7 */
8

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1031}
1032
1033static void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
1034{
1035 u8 learn[DSA_MAX_PORTS];
1036 int first, index, cnt;
1037 struct ksz_port *p;
1038
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Microchip KSZ8795 switch driver
4 *
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
7 */
8

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1031}
1032
1033static void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
1034{
1035 u8 learn[DSA_MAX_PORTS];
1036 int first, index, cnt;
1037 struct ksz_port *p;
1038
1039 if ((uint)port < dev->port_cnt) {
1039 if ((uint)port < dev->info->port_cnt) {
1040 first = port;
1041 cnt = port + 1;
1042 } else {
1043 /* Flush all ports. */
1044 first = 0;
1040 first = port;
1041 cnt = port + 1;
1042 } else {
1043 /* Flush all ports. */
1044 first = 0;
1045 cnt = dev->port_cnt;
1045 cnt = dev->info->port_cnt;
1046 }
1047 for (index = first; index < cnt; index++) {
1048 p = &dev->ports[index];
1049 if (!p->on)
1050 continue;
1051 ksz_pread8(dev, index, P_STP_CTRL, &learn[index]);
1052 if (!(learn[index] & PORT_LEARN_DISABLE))
1053 ksz_pwrite8(dev, index, P_STP_CTRL,

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1113 if (untagged != p->remove_tag && vlan->vid != 0 &&
1114 port != dev->cpu_port) {
1115 unsigned int vid;
1116
1117 /* Reject attempts to add a VLAN that requires the
1118 * Remove Tag flag to be changed, unless there are no
1119 * other VLANs currently configured.
1120 */
1046 }
1047 for (index = first; index < cnt; index++) {
1048 p = &dev->ports[index];
1049 if (!p->on)
1050 continue;
1051 ksz_pread8(dev, index, P_STP_CTRL, &learn[index]);
1052 if (!(learn[index] & PORT_LEARN_DISABLE))
1053 ksz_pwrite8(dev, index, P_STP_CTRL,

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1113 if (untagged != p->remove_tag && vlan->vid != 0 &&
1114 port != dev->cpu_port) {
1115 unsigned int vid;
1116
1117 /* Reject attempts to add a VLAN that requires the
1118 * Remove Tag flag to be changed, unless there are no
1119 * other VLANs currently configured.
1120 */
1121 for (vid = 1; vid < dev->num_vlans; ++vid) {
1121 for (vid = 1; vid < dev->info->num_vlans; ++vid) {
1122 /* Skip the VID we are going to add or reconfigure */
1123 if (vid == vlan->vid)
1124 continue;
1125
1126 ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1127 &fid, &member, &valid);
1128 if (valid && (member & BIT(port)))
1129 return -EINVAL;

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1384 int ret = 0;
1385
1386 /* KSZ87xx Errata DS80000687C.
1387 * Module 2: Link drops with some EEE link partners.
1388 * An issue with the EEE next page exchange between the
1389 * KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
1390 * the link dropping.
1391 */
1122 /* Skip the VID we are going to add or reconfigure */
1123 if (vid == vlan->vid)
1124 continue;
1125
1126 ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1127 &fid, &member, &valid);
1128 if (valid && (member & BIT(port)))
1129 return -EINVAL;

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1384 int ret = 0;
1385
1386 /* KSZ87xx Errata DS80000687C.
1387 * Module 2: Link drops with some EEE link partners.
1388 * An issue with the EEE next page exchange between the
1389 * KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
1390 * the link dropping.
1391 */
1392 if (dev->ksz87xx_eee_link_erratum)
1392 if (dev->info->ksz87xx_eee_link_erratum)
1393 ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
1394
1395 return ret;
1396}
1397
1398static int ksz8_setup(struct dsa_switch *ds)
1399{
1400 struct ksz_device *dev = ds->priv;
1401 struct alu_struct alu;
1402 int i, ret = 0;
1403
1404 dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
1393 ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
1394
1395 return ret;
1396}
1397
1398static int ksz8_setup(struct dsa_switch *ds)
1399{
1400 struct ksz_device *dev = ds->priv;
1401 struct alu_struct alu;
1402 int i, ret = 0;
1403
1404 dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
1405 dev->num_vlans, GFP_KERNEL);
1405 dev->info->num_vlans, GFP_KERNEL);
1406 if (!dev->vlan_cache)
1407 return -ENOMEM;
1408
1409 ret = ksz8_reset_switch(dev);
1410 if (ret) {
1411 dev_err(ds->dev, "failed to reset switch\n");
1412 return ret;
1413 }

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1441 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1442
1443 /* set broadcast storm protection 10% rate */
1444 regmap_update_bits(dev->regmap[1], S_REPLACE_VID_CTRL,
1445 BROADCAST_STORM_RATE,
1446 (BROADCAST_STORM_VALUE *
1447 BROADCAST_STORM_PROT_RATE) / 100);
1448
1406 if (!dev->vlan_cache)
1407 return -ENOMEM;
1408
1409 ret = ksz8_reset_switch(dev);
1410 if (ret) {
1411 dev_err(ds->dev, "failed to reset switch\n");
1412 return ret;
1413 }

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1441 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1442
1443 /* set broadcast storm protection 10% rate */
1444 regmap_update_bits(dev->regmap[1], S_REPLACE_VID_CTRL,
1445 BROADCAST_STORM_RATE,
1446 (BROADCAST_STORM_VALUE *
1447 BROADCAST_STORM_PROT_RATE) / 100);
1448
1449 for (i = 0; i < (dev->num_vlans / 4); i++)
1449 for (i = 0; i < (dev->info->num_vlans / 4); i++)
1450 ksz8_r_vlan_entries(dev, i);
1451
1452 /* Setup STP address for STP operation. */
1453 memset(&alu, 0, sizeof(alu));
1454 ether_addr_copy(alu.mac, eth_stp_addr);
1455 alu.is_static = true;
1456 alu.is_override = true;
1457 alu.port_forward = dev->host_mask;

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1566 }
1567 id16 &= ~0xff;
1568 id16 |= id2;
1569 dev->chip_id = id16;
1570
1571 return 0;
1572}
1573
1450 ksz8_r_vlan_entries(dev, i);
1451
1452 /* Setup STP address for STP operation. */
1453 memset(&alu, 0, sizeof(alu));
1454 ether_addr_copy(alu.mac, eth_stp_addr);
1455 alu.is_static = true;
1456 alu.is_override = true;
1457 alu.port_forward = dev->host_mask;

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1566 }
1567 id16 &= ~0xff;
1568 id16 |= id2;
1569 dev->chip_id = id16;
1570
1571 return 0;
1572}
1573
1574struct ksz_chip_data {
1575 u16 chip_id;
1576 const char *dev_name;
1577 int num_vlans;
1578 int num_alus;
1579 int num_statics;
1580 int cpu_ports;
1581 int port_cnt;
1582 bool ksz87xx_eee_link_erratum;
1583};
1584
1585static const struct ksz_chip_data ksz8_switch_chips[] = {
1586 {
1587 .chip_id = 0x8795,
1588 .dev_name = "KSZ8795",
1589 .num_vlans = 4096,
1590 .num_alus = 0,
1591 .num_statics = 8,
1592 .cpu_ports = 0x10, /* can be configured as cpu port */
1593 .port_cnt = 5, /* total cpu and user ports */
1594 .ksz87xx_eee_link_erratum = true,
1595 },
1596 {
1597 /*
1598 * WARNING
1599 * =======
1600 * KSZ8794 is similar to KSZ8795, except the port map
1601 * contains a gap between external and CPU ports, the
1602 * port map is NOT continuous. The per-port register
1603 * map is shifted accordingly too, i.e. registers at
1604 * offset 0x40 are NOT used on KSZ8794 and they ARE
1605 * used on KSZ8795 for external port 3.
1606 * external cpu
1607 * KSZ8794 0,1,2 4
1608 * KSZ8795 0,1,2,3 4
1609 * KSZ8765 0,1,2,3 4
1610 * port_cnt is configured as 5, even though it is 4
1611 */
1612 .chip_id = 0x8794,
1613 .dev_name = "KSZ8794",
1614 .num_vlans = 4096,
1615 .num_alus = 0,
1616 .num_statics = 8,
1617 .cpu_ports = 0x10, /* can be configured as cpu port */
1618 .port_cnt = 5, /* total cpu and user ports */
1619 .ksz87xx_eee_link_erratum = true,
1620 },
1621 {
1622 .chip_id = 0x8765,
1623 .dev_name = "KSZ8765",
1624 .num_vlans = 4096,
1625 .num_alus = 0,
1626 .num_statics = 8,
1627 .cpu_ports = 0x10, /* can be configured as cpu port */
1628 .port_cnt = 5, /* total cpu and user ports */
1629 .ksz87xx_eee_link_erratum = true,
1630 },
1631 {
1632 .chip_id = 0x8830,
1633 .dev_name = "KSZ8863/KSZ8873",
1634 .num_vlans = 16,
1635 .num_alus = 0,
1636 .num_statics = 8,
1637 .cpu_ports = 0x4, /* can be configured as cpu port */
1638 .port_cnt = 3,
1639 },
1640};
1641
1642static int ksz8_switch_init(struct ksz_device *dev)
1643{
1644 struct ksz8 *ksz8 = dev->priv;
1645 int i;
1646
1647 dev->ds->ops = &ksz8_switch_ops;
1648
1574static int ksz8_switch_init(struct ksz_device *dev)
1575{
1576 struct ksz8 *ksz8 = dev->priv;
1577 int i;
1578
1579 dev->ds->ops = &ksz8_switch_ops;
1580
1649 for (i = 0; i < ARRAY_SIZE(ksz8_switch_chips); i++) {
1650 const struct ksz_chip_data *chip = &ksz8_switch_chips[i];
1581 dev->cpu_port = fls(dev->info->cpu_ports) - 1;
1582 dev->host_mask = dev->info->cpu_ports;
1583 dev->phy_port_cnt = dev->info->port_cnt - 1;
1584 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports;
1651
1585
1652 if (dev->chip_id == chip->chip_id) {
1653 dev->name = chip->dev_name;
1654 dev->num_vlans = chip->num_vlans;
1655 dev->num_alus = chip->num_alus;
1656 dev->num_statics = chip->num_statics;
1657 dev->port_cnt = chip->port_cnt;
1658 dev->cpu_port = fls(chip->cpu_ports) - 1;
1659 dev->phy_port_cnt = dev->port_cnt - 1;
1660 dev->cpu_ports = chip->cpu_ports;
1661 dev->host_mask = chip->cpu_ports;
1662 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) |
1663 chip->cpu_ports;
1664 dev->ksz87xx_eee_link_erratum =
1665 chip->ksz87xx_eee_link_erratum;
1666 break;
1667 }
1668 }
1669
1670 /* no switch found */
1671 if (!dev->cpu_ports)
1672 return -ENODEV;
1673
1674 if (ksz_is_ksz88x3(dev)) {
1675 ksz8->regs = ksz8863_regs;
1676 ksz8->masks = ksz8863_masks;
1677 ksz8->shifts = ksz8863_shifts;
1678 dev->mib_cnt = ARRAY_SIZE(ksz88xx_mib_names);
1679 dev->mib_names = ksz88xx_mib_names;
1680 } else {
1681 ksz8->regs = ksz8795_regs;
1682 ksz8->masks = ksz8795_masks;
1683 ksz8->shifts = ksz8795_shifts;
1684 dev->mib_cnt = ARRAY_SIZE(ksz87xx_mib_names);
1685 dev->mib_names = ksz87xx_mib_names;
1686 }
1687
1688 dev->reg_mib_cnt = MIB_COUNTER_NUM;
1689
1690 dev->ports = devm_kzalloc(dev->dev,
1586 if (ksz_is_ksz88x3(dev)) {
1587 ksz8->regs = ksz8863_regs;
1588 ksz8->masks = ksz8863_masks;
1589 ksz8->shifts = ksz8863_shifts;
1590 dev->mib_cnt = ARRAY_SIZE(ksz88xx_mib_names);
1591 dev->mib_names = ksz88xx_mib_names;
1592 } else {
1593 ksz8->regs = ksz8795_regs;
1594 ksz8->masks = ksz8795_masks;
1595 ksz8->shifts = ksz8795_shifts;
1596 dev->mib_cnt = ARRAY_SIZE(ksz87xx_mib_names);
1597 dev->mib_names = ksz87xx_mib_names;
1598 }
1599
1600 dev->reg_mib_cnt = MIB_COUNTER_NUM;
1601
1602 dev->ports = devm_kzalloc(dev->dev,
1691 dev->port_cnt * sizeof(struct ksz_port),
1603 dev->info->port_cnt * sizeof(struct ksz_port),
1692 GFP_KERNEL);
1693 if (!dev->ports)
1694 return -ENOMEM;
1604 GFP_KERNEL);
1605 if (!dev->ports)
1606 return -ENOMEM;
1695 for (i = 0; i < dev->port_cnt; i++) {
1607 for (i = 0; i < dev->info->port_cnt; i++) {
1696 mutex_init(&dev->ports[i].mib.cnt_mutex);
1697 dev->ports[i].mib.counters =
1698 devm_kzalloc(dev->dev,
1699 sizeof(u64) *
1700 (dev->mib_cnt + 1),
1701 GFP_KERNEL);
1702 if (!dev->ports[i].mib.counters)
1703 return -ENOMEM;
1704 }
1705
1706 /* set the real number of ports */
1608 mutex_init(&dev->ports[i].mib.cnt_mutex);
1609 dev->ports[i].mib.counters =
1610 devm_kzalloc(dev->dev,
1611 sizeof(u64) *
1612 (dev->mib_cnt + 1),
1613 GFP_KERNEL);
1614 if (!dev->ports[i].mib.counters)
1615 return -ENOMEM;
1616 }
1617
1618 /* set the real number of ports */
1707 dev->ds->num_ports = dev->port_cnt;
1619 dev->ds->num_ports = dev->info->port_cnt;
1708
1709 /* We rely on software untagging on the CPU port, so that we
1710 * can support both tagged and untagged VLANs
1711 */
1712 dev->ds->untag_bridge_pvid = true;
1713
1714 /* VLAN filtering is partly controlled by the global VLAN
1715 * Enable flag

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1621 /* We rely on software untagging on the CPU port, so that we
1622 * can support both tagged and untagged VLANs
1623 */
1624 dev->ds->untag_bridge_pvid = true;
1625
1626 /* VLAN filtering is partly controlled by the global VLAN
1627 * Enable flag

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