ksz8795.c (6b30cfa86ee703dc75743d56b078661753a18da3) ksz8795.c (55a952eef70a51340afdf080ecf81dd2b7bbf952)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Microchip KSZ8795 switch driver
4 *
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
7 */
8

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1354
1355int ksz8_setup(struct dsa_switch *ds)
1356{
1357 struct ksz_device *dev = ds->priv;
1358 int i;
1359
1360 ds->mtu_enforcement_ingress = true;
1361
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Microchip KSZ8795 switch driver
4 *
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
7 */
8

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1354
1355int ksz8_setup(struct dsa_switch *ds)
1356{
1357 struct ksz_device *dev = ds->priv;
1358 int i;
1359
1360 ds->mtu_enforcement_ingress = true;
1361
1362 /* We rely on software untagging on the CPU port, so that we
1363 * can support both tagged and untagged VLANs
1364 */
1365 ds->untag_bridge_pvid = true;
1366
1367 /* VLAN filtering is partly controlled by the global VLAN
1368 * Enable flag
1369 */
1370 ds->vlan_filtering_is_global = true;
1371
1362 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1363
1364 /* Enable automatic fast aging when link changed detected. */
1365 ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1366
1367 /* Enable aggressive back off algorithm in half duplex mode. */
1368 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,
1369 SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);

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1413}
1414
1415int ksz8_switch_init(struct ksz_device *dev)
1416{
1417 dev->cpu_port = fls(dev->info->cpu_ports) - 1;
1418 dev->phy_port_cnt = dev->info->port_cnt - 1;
1419 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports;
1420
1372 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1373
1374 /* Enable automatic fast aging when link changed detected. */
1375 ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1376
1377 /* Enable aggressive back off algorithm in half duplex mode. */
1378 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,
1379 SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);

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1423}
1424
1425int ksz8_switch_init(struct ksz_device *dev)
1426{
1427 dev->cpu_port = fls(dev->info->cpu_ports) - 1;
1428 dev->phy_port_cnt = dev->info->port_cnt - 1;
1429 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports;
1430
1421 /* We rely on software untagging on the CPU port, so that we
1422 * can support both tagged and untagged VLANs
1423 */
1424 dev->ds->untag_bridge_pvid = true;
1425
1426 /* VLAN filtering is partly controlled by the global VLAN
1427 * Enable flag
1428 */
1429 dev->ds->vlan_filtering_is_global = true;
1430
1431 return 0;
1432}
1433
1434void ksz8_switch_exit(struct ksz_device *dev)
1435{
1436 ksz8_reset_switch(dev);
1437}
1438
1439MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1440MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1441MODULE_LICENSE("GPL");
1431 return 0;
1432}
1433
1434void ksz8_switch_exit(struct ksz_device *dev)
1435{
1436 ksz8_reset_switch(dev);
1437}
1438
1439MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1440MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1441MODULE_LICENSE("GPL");