s3c2410.c (716bbbabcc68c2b0e1b805d369c0bd58f4fdea30) s3c2410.c (bf6065c6c08fa3ed7bdf8d28b8062ce8e58c1543)
1/*
2 * Copyright © 2004-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2410/S3C2440/S3C2412 NAND driver
7 *
8 * This program is free software; you can redistribute it and/or modify

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879 if (np)
880 chip->setup_data_interface = s3c2410_nand_setup_data_interface;
881
882 switch (info->cpu_type) {
883 case TYPE_S3C2410:
884 chip->legacy.IO_ADDR_W = regs + S3C2410_NFDATA;
885 info->sel_reg = regs + S3C2410_NFCONF;
886 info->sel_bit = S3C2410_NFCONF_nFCE;
1/*
2 * Copyright © 2004-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2410/S3C2440/S3C2412 NAND driver
7 *
8 * This program is free software; you can redistribute it and/or modify

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879 if (np)
880 chip->setup_data_interface = s3c2410_nand_setup_data_interface;
881
882 switch (info->cpu_type) {
883 case TYPE_S3C2410:
884 chip->legacy.IO_ADDR_W = regs + S3C2410_NFDATA;
885 info->sel_reg = regs + S3C2410_NFCONF;
886 info->sel_bit = S3C2410_NFCONF_nFCE;
887 chip->cmd_ctrl = s3c2410_nand_hwcontrol;
887 chip->legacy.cmd_ctrl = s3c2410_nand_hwcontrol;
888 chip->dev_ready = s3c2410_nand_devready;
889 break;
890
891 case TYPE_S3C2440:
892 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA;
893 info->sel_reg = regs + S3C2440_NFCONT;
894 info->sel_bit = S3C2440_NFCONT_nFCE;
888 chip->dev_ready = s3c2410_nand_devready;
889 break;
890
891 case TYPE_S3C2440:
892 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA;
893 info->sel_reg = regs + S3C2440_NFCONT;
894 info->sel_bit = S3C2440_NFCONT_nFCE;
895 chip->cmd_ctrl = s3c2440_nand_hwcontrol;
895 chip->legacy.cmd_ctrl = s3c2440_nand_hwcontrol;
896 chip->dev_ready = s3c2440_nand_devready;
897 chip->legacy.read_buf = s3c2440_nand_read_buf;
898 chip->legacy.write_buf = s3c2440_nand_write_buf;
899 break;
900
901 case TYPE_S3C2412:
902 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA;
903 info->sel_reg = regs + S3C2440_NFCONT;
904 info->sel_bit = S3C2412_NFCONT_nFCE0;
896 chip->dev_ready = s3c2440_nand_devready;
897 chip->legacy.read_buf = s3c2440_nand_read_buf;
898 chip->legacy.write_buf = s3c2440_nand_write_buf;
899 break;
900
901 case TYPE_S3C2412:
902 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA;
903 info->sel_reg = regs + S3C2440_NFCONT;
904 info->sel_bit = S3C2412_NFCONT_nFCE0;
905 chip->cmd_ctrl = s3c2440_nand_hwcontrol;
905 chip->legacy.cmd_ctrl = s3c2440_nand_hwcontrol;
906 chip->dev_ready = s3c2412_nand_devready;
907
908 if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT)
909 dev_info(info->device, "System booted from NAND\n");
910
911 break;
912 }
913

--- 392 unchanged lines hidden --- 		906 chip->dev_ready = s3c2412_nand_devready;
907
908 if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT)
909 dev_info(info->device, "System booted from NAND\n");
910
911 break;
912 }
913

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