ndfc.c (716bbbabcc68c2b0e1b805d369c0bd58f4fdea30) ndfc.c (bf6065c6c08fa3ed7bdf8d28b8062ce8e58c1543)
1/*
2 * Overview:
3 * Platform independent driver for NDFC (NanD Flash Controller)
4 * integrated into EP440 cores
5 *
6 * Ported to an OF platform driver by Sean MacLennan
7 *
8 * The NDFC supports multiple chips, but this driver only supports a

--- 130 unchanged lines hidden (view full) ---

139{
140 struct device_node *flash_np;
141 struct nand_chip *chip = &ndfc->chip;
142 struct mtd_info *mtd = nand_to_mtd(chip);
143 int ret;
144
145 chip->legacy.IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA;
146 chip->legacy.IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA;
1/*
2 * Overview:
3 * Platform independent driver for NDFC (NanD Flash Controller)
4 * integrated into EP440 cores
5 *
6 * Ported to an OF platform driver by Sean MacLennan
7 *
8 * The NDFC supports multiple chips, but this driver only supports a

--- 130 unchanged lines hidden (view full) ---

139{
140 struct device_node *flash_np;
141 struct nand_chip *chip = &ndfc->chip;
142 struct mtd_info *mtd = nand_to_mtd(chip);
143 int ret;
144
145 chip->legacy.IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA;
146 chip->legacy.IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA;
147 chip->cmd_ctrl = ndfc_hwcontrol;
147 chip->legacy.cmd_ctrl = ndfc_hwcontrol;
148 chip->dev_ready = ndfc_ready;
149 chip->select_chip = ndfc_select_chip;
150 chip->chip_delay = 50;
151 chip->controller = &ndfc->ndfc_control;
152 chip->legacy.read_buf = ndfc_read_buf;
153 chip->legacy.write_buf = ndfc_write_buf;
154 chip->ecc.correct = nand_correct_data;
155 chip->ecc.hwctl = ndfc_enable_hwecc;

--- 124 unchanged lines hidden --- 		148 chip->dev_ready = ndfc_ready;
149 chip->select_chip = ndfc_select_chip;
150 chip->chip_delay = 50;
151 chip->controller = &ndfc->ndfc_control;
152 chip->legacy.read_buf = ndfc_read_buf;
153 chip->legacy.write_buf = ndfc_write_buf;
154 chip->ecc.correct = nand_correct_data;
155 chip->ecc.hwctl = ndfc_enable_hwecc;

--- 124 unchanged lines hidden ---