mxcmmc.c (4d68c05ce11f4cdf6a6392f3a18dc6a985b4d0c4) mxcmmc.c (258aea76f552cc755da92e7e823abbb85e021514)
1/*
2 * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver
3 *
4 * This is a driver for the SDHC controller found in Freescale MX2/MX3
5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
6 * Unlike the hardware found on MX1, this hardware just works and does
7 * not need all the quirks found in imxmmc.c, hence the separate driver.
8 *

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28#include <linux/mmc/host.h>
29#include <linux/mmc/card.h>
30#include <linux/delay.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33#include <linux/gpio.h>
34#include <linux/regulator/consumer.h>
35#include <linux/dmaengine.h>
1/*
2 * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver
3 *
4 * This is a driver for the SDHC controller found in Freescale MX2/MX3
5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
6 * Unlike the hardware found on MX1, this hardware just works and does
7 * not need all the quirks found in imxmmc.c, hence the separate driver.
8 *

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28#include <linux/mmc/host.h>
29#include <linux/mmc/card.h>
30#include <linux/delay.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33#include <linux/gpio.h>
34#include <linux/regulator/consumer.h>
35#include <linux/dmaengine.h>
36#include <linux/types.h>
36
37#include <asm/dma.h>
38#include <asm/irq.h>
39#include <asm/sizes.h>
40#include <mach/mmc.h>
41
42#include <mach/dma.h>
43#include <mach/hardware.h>

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262 dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len,
263 host->dma_dir);
264 host->do_dma = 0;
265 return 0; /* Fall back to PIO */
266 }
267 wmb();
268
269 dmaengine_submit(host->desc);
37
38#include <asm/dma.h>
39#include <asm/irq.h>
40#include <asm/sizes.h>
41#include <mach/mmc.h>
42
43#include <mach/dma.h>
44#include <mach/hardware.h>

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263 dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len,
264 host->dma_dir);
265 host->do_dma = 0;
266 return 0; /* Fall back to PIO */
267 }
268 wmb();
269
270 dmaengine_submit(host->desc);
271 dma_async_issue_pending(host->dma);
270
271 return 0;
272}
273
274static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd,
275 unsigned int cmdat)
276{
277 u32 int_cntr = host->default_irq_mask;

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705 struct dma_slave_config *config = &host->dma_slave_config;
706
707 config->dst_addr = host->res->start + MMC_REG_BUFFER_ACCESS;
708 config->src_addr = host->res->start + MMC_REG_BUFFER_ACCESS;
709 config->dst_addr_width = 4;
710 config->src_addr_width = 4;
711 config->dst_maxburst = host->burstlen;
712 config->src_maxburst = host->burstlen;
272
273 return 0;
274}
275
276static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd,
277 unsigned int cmdat)
278{
279 u32 int_cntr = host->default_irq_mask;

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707 struct dma_slave_config *config = &host->dma_slave_config;
708
709 config->dst_addr = host->res->start + MMC_REG_BUFFER_ACCESS;
710 config->src_addr = host->res->start + MMC_REG_BUFFER_ACCESS;
711 config->dst_addr_width = 4;
712 config->src_addr_width = 4;
713 config->dst_maxburst = host->burstlen;
714 config->src_maxburst = host->burstlen;
715 config->device_fc = false;
713
714 return dmaengine_slave_config(host->dma, config);
715}
716
717static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
718{
719 struct mxcmci_host *host = mmc_priv(mmc);
720 int burstlen, ret;

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716
717 return dmaengine_slave_config(host->dma, config);
718}
719
720static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
721{
722 struct mxcmci_host *host = mmc_priv(mmc);
723 int burstlen, ret;

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