cxl.h (588b34be20bc3dd7441c108c95039933699467ab) cxl.h (0b3f9c757cabad4b8101c5fcddddd029ed5506a6)
1/*
2 * Copyright 2014 IBM Corp.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */

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526 __be32 ctxtime;
527 __be16 ivte_offsets[4];
528 __be16 ivte_ranges[4];
529 __be32 lpid;
530 struct cxl_process_element_common common;
531 __be32 software_state;
532} __packed;
533
1/*
2 * Copyright 2014 IBM Corp.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */

--- 517 unchanged lines hidden (view full) ---

526 __be32 ctxtime;
527 __be16 ivte_offsets[4];
528 __be16 ivte_ranges[4];
529 __be32 lpid;
530 struct cxl_process_element_common common;
531 __be32 software_state;
532} __packed;
533
534static inline bool cxl_adapter_link_ok(struct cxl *cxl)
535{
536 struct pci_dev *pdev;
537
538 pdev = to_pci_dev(cxl->dev.parent);
539 return !pci_channel_offline(pdev);
540}
541
534static inline void __iomem *_cxl_p1_addr(struct cxl *cxl, cxl_p1_reg_t reg)
535{
536 WARN_ON(!cpu_has_feature(CPU_FTR_HVMODE));
537 return cxl->p1_mmio + cxl_reg_off(reg);
538}
539
540static inline void cxl_p1_write(struct cxl *cxl, cxl_p1_reg_t reg, u64 val)
541{
542static inline void __iomem *_cxl_p1_addr(struct cxl *cxl, cxl_p1_reg_t reg)
543{
544 WARN_ON(!cpu_has_feature(CPU_FTR_HVMODE));
545 return cxl->p1_mmio + cxl_reg_off(reg);
546}
547
548static inline void cxl_p1_write(struct cxl *cxl, cxl_p1_reg_t reg, u64 val)
549{
542 out_be64(_cxl_p1_addr(cxl, reg), val);
550 if (likely(cxl_adapter_link_ok(cxl)))
551 out_be64(_cxl_p1_addr(cxl, reg), val);
543}
544
545static inline u64 cxl_p1_read(struct cxl *cxl, cxl_p1_reg_t reg)
546{
552}
553
554static inline u64 cxl_p1_read(struct cxl *cxl, cxl_p1_reg_t reg)
555{
547 return in_be64(_cxl_p1_addr(cxl, reg));
556 if (likely(cxl_adapter_link_ok(cxl)))
557 return in_be64(_cxl_p1_addr(cxl, reg));
558 else
559 return ~0ULL;
548}
549
550static inline void __iomem *_cxl_p1n_addr(struct cxl_afu *afu, cxl_p1n_reg_t reg)
551{
552 WARN_ON(!cpu_has_feature(CPU_FTR_HVMODE));
553 return afu->p1n_mmio + cxl_reg_off(reg);
554}
555
556static inline void cxl_p1n_write(struct cxl_afu *afu, cxl_p1n_reg_t reg, u64 val)
557{
560}
561
562static inline void __iomem *_cxl_p1n_addr(struct cxl_afu *afu, cxl_p1n_reg_t reg)
563{
564 WARN_ON(!cpu_has_feature(CPU_FTR_HVMODE));
565 return afu->p1n_mmio + cxl_reg_off(reg);
566}
567
568static inline void cxl_p1n_write(struct cxl_afu *afu, cxl_p1n_reg_t reg, u64 val)
569{
558 out_be64(_cxl_p1n_addr(afu, reg), val);
570 if (likely(cxl_adapter_link_ok(afu->adapter)))
571 out_be64(_cxl_p1n_addr(afu, reg), val);
559}
560
561static inline u64 cxl_p1n_read(struct cxl_afu *afu, cxl_p1n_reg_t reg)
562{
572}
573
574static inline u64 cxl_p1n_read(struct cxl_afu *afu, cxl_p1n_reg_t reg)
575{
563 return in_be64(_cxl_p1n_addr(afu, reg));
576 if (likely(cxl_adapter_link_ok(afu->adapter)))
577 return in_be64(_cxl_p1n_addr(afu, reg));
578 else
579 return ~0ULL;
564}
565
566static inline void __iomem *_cxl_p2n_addr(struct cxl_afu *afu, cxl_p2n_reg_t reg)
567{
568 return afu->p2n_mmio + cxl_reg_off(reg);
569}
570
571static inline void cxl_p2n_write(struct cxl_afu *afu, cxl_p2n_reg_t reg, u64 val)
572{
580}
581
582static inline void __iomem *_cxl_p2n_addr(struct cxl_afu *afu, cxl_p2n_reg_t reg)
583{
584 return afu->p2n_mmio + cxl_reg_off(reg);
585}
586
587static inline void cxl_p2n_write(struct cxl_afu *afu, cxl_p2n_reg_t reg, u64 val)
588{
573 out_be64(_cxl_p2n_addr(afu, reg), val);
589 if (likely(cxl_adapter_link_ok(afu->adapter)))
590 out_be64(_cxl_p2n_addr(afu, reg), val);
574}
575
576static inline u64 cxl_p2n_read(struct cxl_afu *afu, cxl_p2n_reg_t reg)
577{
591}
592
593static inline u64 cxl_p2n_read(struct cxl_afu *afu, cxl_p2n_reg_t reg)
594{
578 return in_be64(_cxl_p2n_addr(afu, reg));
595 if (likely(cxl_adapter_link_ok(afu->adapter)))
596 return in_be64(_cxl_p2n_addr(afu, reg));
597 else
598 return ~0ULL;
579}
580
581static inline u64 cxl_afu_cr_read64(struct cxl_afu *afu, int cr, u64 off)
582{
599}
600
601static inline u64 cxl_afu_cr_read64(struct cxl_afu *afu, int cr, u64 off)
602{
583 return in_le64((afu)->afu_desc_mmio + (afu)->crs_offset + ((cr) * (afu)->crs_len) + (off));
603 if (likely(cxl_adapter_link_ok(afu->adapter)))
604 return in_le64((afu)->afu_desc_mmio + (afu)->crs_offset +
605 ((cr) * (afu)->crs_len) + (off));
606 else
607 return ~0ULL;
584}
585
586static inline u32 cxl_afu_cr_read32(struct cxl_afu *afu, int cr, u64 off)
587{
608}
609
610static inline u32 cxl_afu_cr_read32(struct cxl_afu *afu, int cr, u64 off)
611{
588 return in_le32((afu)->afu_desc_mmio + (afu)->crs_offset + ((cr) * (afu)->crs_len) + (off));
612 if (likely(cxl_adapter_link_ok(afu->adapter)))
613 return in_le32((afu)->afu_desc_mmio + (afu)->crs_offset +
614 ((cr) * (afu)->crs_len) + (off));
615 else
616 return 0xffffffff;
589}
590u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
591u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
592
593ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
594 loff_t off, size_t count);
595
596

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618u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
619u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
620
621ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
622 loff_t off, size_t count);
623
624

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