ipoctal.c (bf61c8840efe60fd8f91446860b63338fb424158) ipoctal.c (968d04e8de53789ccdb9f74413eb497f155d266b)
1/**
2 * ipoctal.c
3 *
4 * driver for the GE IP-OCTAL boards
5 *
6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>

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172static void ipoctal_irq_tx(struct ipoctal_channel *channel)
173{
174 unsigned char value;
175 unsigned int *pointer_write = &channel->pointer_write;
176
177 if (channel->nb_bytes == 0)
178 return;
179
1/**
2 * ipoctal.c
3 *
4 * driver for the GE IP-OCTAL boards
5 *
6 * Copyright (C) 2009-2012 CERN (www.cern.ch)
7 * Author: Nicolas Serafini, EIC2 SA
8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com>

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172static void ipoctal_irq_tx(struct ipoctal_channel *channel)
173{
174 unsigned char value;
175 unsigned int *pointer_write = &channel->pointer_write;
176
177 if (channel->nb_bytes == 0)
178 return;
179
180 spin_lock(&channel->lock);
180 value = channel->tty_port.xmit_buf[*pointer_write];
181 iowrite8(value, &channel->regs->w.thr);
182 channel->stats.tx++;
183 (*pointer_write)++;
184 *pointer_write = *pointer_write % PAGE_SIZE;
185 channel->nb_bytes--;
181 value = channel->tty_port.xmit_buf[*pointer_write];
182 iowrite8(value, &channel->regs->w.thr);
183 channel->stats.tx++;
184 (*pointer_write)++;
185 *pointer_write = *pointer_write % PAGE_SIZE;
186 channel->nb_bytes--;
187 spin_unlock(&channel->lock);
186}
187
188static void ipoctal_irq_channel(struct ipoctal_channel *channel)
189{
190 u8 isr, sr;
191
188}
189
190static void ipoctal_irq_channel(struct ipoctal_channel *channel)
191{
192 u8 isr, sr;
193
192 spin_lock(&channel->lock);
193 /* The HW is organized in pair of channels. See which register we need
194 * to read from */
195 isr = ioread8(&channel->block_regs->r.isr);
196 sr = ioread8(&channel->regs->r.sr);
197
198 if ((sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) {
199 iowrite8(CR_DISABLE_TX, &channel->regs->w.cr);
200 /* In case of RS-485, change from TX to RX when finishing TX.

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208
209 /* RX data */
210 if ((isr & channel->isr_rx_rdy_mask) && (sr & SR_RX_READY))
211 ipoctal_irq_rx(channel, sr);
212
213 /* TX of each character */
214 if ((isr & channel->isr_tx_rdy_mask) && (sr & SR_TX_READY))
215 ipoctal_irq_tx(channel);
194 /* The HW is organized in pair of channels. See which register we need
195 * to read from */
196 isr = ioread8(&channel->block_regs->r.isr);
197 sr = ioread8(&channel->regs->r.sr);
198
199 if ((sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) {
200 iowrite8(CR_DISABLE_TX, &channel->regs->w.cr);
201 /* In case of RS-485, change from TX to RX when finishing TX.

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209
210 /* RX data */
211 if ((isr & channel->isr_rx_rdy_mask) && (sr & SR_RX_READY))
212 ipoctal_irq_rx(channel, sr);
213
214 /* TX of each character */
215 if ((isr & channel->isr_tx_rdy_mask) && (sr & SR_TX_READY))
216 ipoctal_irq_tx(channel);
216
217 spin_unlock(&channel->lock);
218}
219
220static irqreturn_t ipoctal_irq_handler(void *arg)
221{
222 unsigned int i;
223 struct ipoctal *ipoctal = (struct ipoctal *) arg;
224
225 /* Clear the IPack device interrupt */

--- 508 unchanged lines hidden --- 		217}
218
219static irqreturn_t ipoctal_irq_handler(void *arg)
220{
221 unsigned int i;
222 struct ipoctal *ipoctal = (struct ipoctal *) arg;
223
224 /* Clear the IPack device interrupt */

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