ipoctal.c (92a19f9cec9a80ad93c06e115822deb729e2c6ad) | ipoctal.c (2e124b4a390ca85325fae75764bef92f0547fa25) |
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1/** 2 * ipoctal.c 3 * 4 * driver for the GE IP-OCTAL boards 5 * 6 * Copyright (C) 2009-2012 CERN (www.cern.ch) 7 * Author: Nicolas Serafini, EIC2 SA 8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com> --- 119 unchanged lines hidden (view full) --- 128 icount->rx = channel->stats.rx; 129 icount->tx = channel->stats.tx; 130 icount->frame = channel->stats.framing_err; 131 icount->parity = channel->stats.parity_err; 132 icount->brk = channel->stats.rcv_break; 133 return 0; 134} 135 | 1/** 2 * ipoctal.c 3 * 4 * driver for the GE IP-OCTAL boards 5 * 6 * Copyright (C) 2009-2012 CERN (www.cern.ch) 7 * Author: Nicolas Serafini, EIC2 SA 8 * Author: Samuel Iglesias Gonsalvez <siglesias@igalia.com> --- 119 unchanged lines hidden (view full) --- 128 icount->rx = channel->stats.rx; 129 icount->tx = channel->stats.tx; 130 icount->frame = channel->stats.framing_err; 131 icount->parity = channel->stats.parity_err; 132 icount->brk = channel->stats.rcv_break; 133 return 0; 134} 135 |
136static void ipoctal_irq_rx(struct ipoctal_channel *channel, 137 struct tty_struct *tty, u8 sr) | 136static void ipoctal_irq_rx(struct ipoctal_channel *channel, u8 sr) |
138{ 139 struct tty_port *port = &channel->tty_port; 140 unsigned char value; 141 unsigned char flag = TTY_NORMAL; 142 u8 isr; 143 144 do { 145 value = ioread8(&channel->regs->r.rhr); --- 25 unchanged lines hidden (view full) --- 171 /* Check if there are more characters in RX FIFO 172 * If there are more, the isr register for this channel 173 * has enabled the RxRDY|FFULL bit. 174 */ 175 isr = ioread8(&channel->block_regs->r.isr); 176 sr = ioread8(&channel->regs->r.sr); 177 } while (isr & channel->isr_rx_rdy_mask); 178 | 137{ 138 struct tty_port *port = &channel->tty_port; 139 unsigned char value; 140 unsigned char flag = TTY_NORMAL; 141 u8 isr; 142 143 do { 144 value = ioread8(&channel->regs->r.rhr); --- 25 unchanged lines hidden (view full) --- 170 /* Check if there are more characters in RX FIFO 171 * If there are more, the isr register for this channel 172 * has enabled the RxRDY|FFULL bit. 173 */ 174 isr = ioread8(&channel->block_regs->r.isr); 175 sr = ioread8(&channel->regs->r.sr); 176 } while (isr & channel->isr_rx_rdy_mask); 177 |
179 tty_flip_buffer_push(tty); | 178 tty_flip_buffer_push(port); |
180} 181 182static void ipoctal_irq_tx(struct ipoctal_channel *channel) 183{ 184 unsigned char value; 185 unsigned int *pointer_write = &channel->pointer_write; 186 187 if (channel->nb_bytes <= 0) { --- 16 unchanged lines hidden (view full) --- 204 wake_up_interruptible(&channel->queue); 205 } 206 } 207} 208 209static void ipoctal_irq_channel(struct ipoctal_channel *channel) 210{ 211 u8 isr, sr; | 179} 180 181static void ipoctal_irq_tx(struct ipoctal_channel *channel) 182{ 183 unsigned char value; 184 unsigned int *pointer_write = &channel->pointer_write; 185 186 if (channel->nb_bytes <= 0) { --- 16 unchanged lines hidden (view full) --- 203 wake_up_interruptible(&channel->queue); 204 } 205 } 206} 207 208static void ipoctal_irq_channel(struct ipoctal_channel *channel) 209{ 210 u8 isr, sr; |
212 struct tty_struct *tty; | |
213 214 /* If there is no client, skip the check */ 215 if (!atomic_read(&channel->open)) 216 return; 217 | 211 212 /* If there is no client, skip the check */ 213 if (!atomic_read(&channel->open)) 214 return; 215 |
218 tty = tty_port_tty_get(&channel->tty_port); 219 if (!tty) 220 return; | |
221 /* The HW is organized in pair of channels. See which register we need 222 * to read from */ 223 isr = ioread8(&channel->block_regs->r.isr); 224 sr = ioread8(&channel->regs->r.sr); 225 226 /* In case of RS-485, change from TX to RX when finishing TX. 227 * Half-duplex. */ 228 if ((channel->board_id == IPACK1_DEVICE_ID_SBS_OCTAL_485) && 229 (sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) { 230 iowrite8(CR_DISABLE_TX, &channel->regs->w.cr); 231 iowrite8(CR_CMD_NEGATE_RTSN, &channel->regs->w.cr); 232 iowrite8(CR_ENABLE_RX, &channel->regs->w.cr); 233 *channel->board_write = 1; 234 wake_up_interruptible(&channel->queue); 235 } 236 237 /* RX data */ 238 if ((isr & channel->isr_rx_rdy_mask) && (sr & SR_RX_READY)) | 216 /* The HW is organized in pair of channels. See which register we need 217 * to read from */ 218 isr = ioread8(&channel->block_regs->r.isr); 219 sr = ioread8(&channel->regs->r.sr); 220 221 /* In case of RS-485, change from TX to RX when finishing TX. 222 * Half-duplex. */ 223 if ((channel->board_id == IPACK1_DEVICE_ID_SBS_OCTAL_485) && 224 (sr & SR_TX_EMPTY) && (channel->nb_bytes == 0)) { 225 iowrite8(CR_DISABLE_TX, &channel->regs->w.cr); 226 iowrite8(CR_CMD_NEGATE_RTSN, &channel->regs->w.cr); 227 iowrite8(CR_ENABLE_RX, &channel->regs->w.cr); 228 *channel->board_write = 1; 229 wake_up_interruptible(&channel->queue); 230 } 231 232 /* RX data */ 233 if ((isr & channel->isr_rx_rdy_mask) && (sr & SR_RX_READY)) |
239 ipoctal_irq_rx(channel, tty, sr); | 234 ipoctal_irq_rx(channel, sr); |
240 241 /* TX of each character */ 242 if ((isr & channel->isr_tx_rdy_mask) && (sr & SR_TX_READY)) 243 ipoctal_irq_tx(channel); 244 | 235 236 /* TX of each character */ 237 if ((isr & channel->isr_tx_rdy_mask) && (sr & SR_TX_READY)) 238 ipoctal_irq_tx(channel); 239 |
245 tty_flip_buffer_push(tty); 246 tty_kref_put(tty); | 240 tty_flip_buffer_push(&channel->tty_port); |
247} 248 249static irqreturn_t ipoctal_irq_handler(void *arg) 250{ 251 unsigned int i; 252 struct ipoctal *ipoctal = (struct ipoctal *) arg; 253 254 /* Check all channels */ --- 500 unchanged lines hidden --- | 241} 242 243static irqreturn_t ipoctal_irq_handler(void *arg) 244{ 245 unsigned int i; 246 struct ipoctal *ipoctal = (struct ipoctal *) arg; 247 248 /* Check all channels */ --- 500 unchanged lines hidden --- |