mtk_iommu.c (c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2) mtk_iommu.c (298f78895b081911e0b3605f07d79ebd3d4cf7b0)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2015-2016 MediaTek Inc.
4 * Author: Yong Wu <yong.wu@mediatek.com>
5 */
6#include <linux/memblock.h>
7#include <linux/bug.h>
8#include <linux/clk.h>

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183 mtk_iommu_tlb_flush_all(cookie);
184 }
185 /* Clear the CPE status */
186 writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
187 data->tlb_flush_active = false;
188 }
189}
190
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2015-2016 MediaTek Inc.
4 * Author: Yong Wu <yong.wu@mediatek.com>
5 */
6#include <linux/memblock.h>
7#include <linux/bug.h>
8#include <linux/clk.h>

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183 mtk_iommu_tlb_flush_all(cookie);
184 }
185 /* Clear the CPE status */
186 writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
187 data->tlb_flush_active = false;
188 }
189}
190
191static const struct iommu_gather_ops mtk_iommu_gather_ops = {
191static const struct iommu_flush_ops mtk_iommu_flush_ops = {
192 .tlb_flush_all = mtk_iommu_tlb_flush_all,
193 .tlb_add_flush = mtk_iommu_tlb_add_flush_nosync,
194 .tlb_sync = mtk_iommu_tlb_sync,
195};
196
197static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
198{
199 struct mtk_iommu_data *data = dev_id;

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262
263 dom->cfg = (struct io_pgtable_cfg) {
264 .quirks = IO_PGTABLE_QUIRK_ARM_NS |
265 IO_PGTABLE_QUIRK_NO_PERMS |
266 IO_PGTABLE_QUIRK_TLBI_ON_MAP,
267 .pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
268 .ias = 32,
269 .oas = 32,
192 .tlb_flush_all = mtk_iommu_tlb_flush_all,
193 .tlb_add_flush = mtk_iommu_tlb_add_flush_nosync,
194 .tlb_sync = mtk_iommu_tlb_sync,
195};
196
197static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
198{
199 struct mtk_iommu_data *data = dev_id;

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262
263 dom->cfg = (struct io_pgtable_cfg) {
264 .quirks = IO_PGTABLE_QUIRK_ARM_NS |
265 IO_PGTABLE_QUIRK_NO_PERMS |
266 IO_PGTABLE_QUIRK_TLBI_ON_MAP,
267 .pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
268 .ias = 32,
269 .oas = 32,
270 .tlb = &mtk_iommu_gather_ops,
270 .tlb = &mtk_iommu_flush_ops,
271 .iommu_dev = data->dev,
272 };
273
274 if (data->enable_4GB)
275 dom->cfg.quirks |= IO_PGTABLE_QUIRK_ARM_MTK_4GB;
276
277 dom->iop = alloc_io_pgtable_ops(ARM_V7S, &dom->cfg, data);
278 if (!dom->iop) {

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271 .iommu_dev = data->dev,
272 };
273
274 if (data->enable_4GB)
275 dom->cfg.quirks |= IO_PGTABLE_QUIRK_ARM_MTK_4GB;
276
277 dom->iop = alloc_io_pgtable_ops(ARM_V7S, &dom->cfg, data);
278 if (!dom->iop) {

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