iommu.c (d842bc6c0579ca7643eed029beabab3ac562a335) iommu.c (1d479f160c500249d8fa4d21e7d2b7aaffc04daf)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright © 2006-2014 Intel Corporation.
4 *
5 * Authors: David Woodhouse <dwmw2@infradead.org>,
6 * Ashok Raj <ashok.raj@intel.com>,
7 * Shaohua Li <shaohua.li@intel.com>,
8 * Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>,

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449 pr_info("IOMMU disabled\n");
450 } else if (!strncmp(str, "igfx_off", 8)) {
451 dmar_map_gfx = 0;
452 pr_info("Disable GFX device mapping\n");
453 } else if (!strncmp(str, "forcedac", 8)) {
454 pr_warn("intel_iommu=forcedac deprecated; use iommu.forcedac instead\n");
455 iommu_dma_forcedac = true;
456 } else if (!strncmp(str, "strict", 6)) {
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright © 2006-2014 Intel Corporation.
4 *
5 * Authors: David Woodhouse <dwmw2@infradead.org>,
6 * Ashok Raj <ashok.raj@intel.com>,
7 * Shaohua Li <shaohua.li@intel.com>,
8 * Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>,

--- 440 unchanged lines hidden (view full) ---

449 pr_info("IOMMU disabled\n");
450 } else if (!strncmp(str, "igfx_off", 8)) {
451 dmar_map_gfx = 0;
452 pr_info("Disable GFX device mapping\n");
453 } else if (!strncmp(str, "forcedac", 8)) {
454 pr_warn("intel_iommu=forcedac deprecated; use iommu.forcedac instead\n");
455 iommu_dma_forcedac = true;
456 } else if (!strncmp(str, "strict", 6)) {
457 pr_warn("intel_iommu=strict deprecated; use iommu.strict=1 instead\n");
457 pr_info("Disable batched IOTLB flush\n");
458 intel_iommu_strict = 1;
459 } else if (!strncmp(str, "sp_off", 6)) {
460 pr_info("Disable supported super page\n");
461 intel_iommu_superpage = 0;
462 } else if (!strncmp(str, "sm_on", 5)) {
463 pr_info("Intel-IOMMU: scalable mode supported\n");
464 intel_iommu_sm = 1;

--- 5349 unchanged lines hidden --- 		458 pr_info("Disable batched IOTLB flush\n");
459 intel_iommu_strict = 1;
460 } else if (!strncmp(str, "sp_off", 6)) {
461 pr_info("Disable supported super page\n");
462 intel_iommu_superpage = 0;
463 } else if (!strncmp(str, "sm_on", 5)) {
464 pr_info("Intel-IOMMU: scalable mode supported\n");
465 intel_iommu_sm = 1;

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